diff options
author | Evan Cheng <evan.cheng@apple.com> | 2009-07-01 01:59:31 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2009-07-01 01:59:31 +0000 |
commit | 2578ba26e72e36dde64be0f52a2788480aad3378 (patch) | |
tree | cff0b3ae5b241d3ad9f268cdf515d8cff4f3aada /lib/Target/Alpha/AlphaInstrInfo.cpp | |
parent | 5bcc8bd0c60cfe583ee47852950aad9e532c932e (diff) | |
download | llvm-2578ba26e72e36dde64be0f52a2788480aad3378.tar.gz llvm-2578ba26e72e36dde64be0f52a2788480aad3378.tar.bz2 llvm-2578ba26e72e36dde64be0f52a2788480aad3378.tar.xz |
Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74580 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaInstrInfo.cpp')
-rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.cpp | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/lib/Target/Alpha/AlphaInstrInfo.cpp b/lib/Target/Alpha/AlphaInstrInfo.cpp index 229f9d4784..203c7b15de 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -289,19 +289,22 @@ MachineInstr *AlphaInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, if (Ops[0] == 0) { // move -> store unsigned InReg = MI->getOperand(1).getReg(); bool isKill = MI->getOperand(1).isKill(); + bool isUndef = MI->getOperand(1).isUndef(); Opc = (Opc == Alpha::BISr) ? Alpha::STQ : ((Opc == Alpha::CPYSS) ? Alpha::STS : Alpha::STT); NewMI = BuildMI(MF, MI->getDebugLoc(), get(Opc)) - .addReg(InReg, getKillRegState(isKill)) + .addReg(InReg, getKillRegState(isKill) | getUndefRegState(isUndef)) .addFrameIndex(FrameIndex) .addReg(Alpha::F31); } else { // load -> move unsigned OutReg = MI->getOperand(0).getReg(); bool isDead = MI->getOperand(0).isDead(); + bool isUndef = MI->getOperand(0).isUndef(); Opc = (Opc == Alpha::BISr) ? Alpha::LDQ : ((Opc == Alpha::CPYSS) ? Alpha::LDS : Alpha::LDT); NewMI = BuildMI(MF, MI->getDebugLoc(), get(Opc)) - .addReg(OutReg, RegState::Define | getDeadRegState(isDead)) + .addReg(OutReg, RegState::Define | getDeadRegState(isDead) | + getUndefRegState(isUndef)) .addFrameIndex(FrameIndex) .addReg(Alpha::F31); } |