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author | Bill Wendling <isanbard@gmail.com> | 2009-05-13 21:33:08 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2009-05-13 21:33:08 +0000 |
commit | 587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4 (patch) | |
tree | f01732c9f02fd1154ac34176b7a5bbf1f5f0fc44 /lib/Target/Alpha/AlphaInstrInfo.cpp | |
parent | 556d0a0d15689531f2b203575a3fe55e00713777 (diff) | |
download | llvm-587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4.tar.gz llvm-587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4.tar.bz2 llvm-587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4.tar.xz |
Change MachineInstrBuilder::addReg() to take a flag instead of a list of
booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't easy, especially if you
aren't spending all of your time in that code.
I took Jakob's suggestion and made it illegal to pass in "true" for the
flag. This should hopefully prevent any unintended misuse of this (by reverting
to the old way of using addReg()).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71722 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaInstrInfo.cpp')
-rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/Alpha/AlphaInstrInfo.cpp b/lib/Target/Alpha/AlphaInstrInfo.cpp index 27408e2c79..a54d97d33c 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -187,15 +187,15 @@ AlphaInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, if (RC == Alpha::F4RCRegisterClass) BuildMI(MBB, MI, DL, get(Alpha::STS)) - .addReg(SrcReg, false, false, isKill) + .addReg(SrcReg, getKillRegState(isKill)) .addFrameIndex(FrameIdx).addReg(Alpha::F31); else if (RC == Alpha::F8RCRegisterClass) BuildMI(MBB, MI, DL, get(Alpha::STT)) - .addReg(SrcReg, false, false, isKill) + .addReg(SrcReg, getKillRegState(isKill)) .addFrameIndex(FrameIdx).addReg(Alpha::F31); else if (RC == Alpha::GPRCRegisterClass) BuildMI(MBB, MI, DL, get(Alpha::STQ)) - .addReg(SrcReg, false, false, isKill) + .addReg(SrcReg, getKillRegState(isKill)) .addFrameIndex(FrameIdx).addReg(Alpha::F31); else abort(); @@ -217,7 +217,7 @@ void AlphaInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, abort(); DebugLoc DL = DebugLoc::getUnknownLoc(); MachineInstrBuilder MIB = - BuildMI(MF, DL, get(Opc)).addReg(SrcReg, false, false, isKill); + BuildMI(MF, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)); for (unsigned i = 0, e = Addr.size(); i != e; ++i) MIB.addOperand(Addr[i]); NewMIs.push_back(MIB); @@ -290,7 +290,7 @@ MachineInstr *AlphaInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, Opc = (Opc == Alpha::BISr) ? Alpha::STQ : ((Opc == Alpha::CPYSS) ? Alpha::STS : Alpha::STT); NewMI = BuildMI(MF, MI->getDebugLoc(), get(Opc)) - .addReg(InReg, false, false, isKill) + .addReg(InReg, getKillRegState(isKill)) .addFrameIndex(FrameIndex) .addReg(Alpha::F31); } else { // load -> move @@ -299,7 +299,7 @@ MachineInstr *AlphaInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, Opc = (Opc == Alpha::BISr) ? Alpha::LDQ : ((Opc == Alpha::CPYSS) ? Alpha::LDS : Alpha::LDT); NewMI = BuildMI(MF, MI->getDebugLoc(), get(Opc)) - .addReg(OutReg, true, false, false, isDead) + .addReg(OutReg, RegState::Define | getDeadRegState(isDead)) .addFrameIndex(FrameIndex) .addReg(Alpha::F31); } |