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authorDan Gohman <gohman@apple.com>2008-07-07 23:14:23 +0000
committerDan Gohman <gohman@apple.com>2008-07-07 23:14:23 +0000
commit8e5f2c6f65841542e2a7092553fe42a00048e4c7 (patch)
tree24fe54b796f3f450ba6aff12b7357068ca66e341 /lib/Target/Alpha/AlphaInstrInfo.cpp
parent0e5f1306b059b62d7725f324e087efbc8e7a782d (diff)
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Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions. This drastically reduces the number of calls to malloc/free made during the "Emit" phase of scheduling, as well as later phases in CodeGen. Combined with other changes, this speeds up the "instruction selection" phase of CodeGen by 10% in some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53212 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaInstrInfo.cpp')
-rw-r--r--lib/Target/Alpha/AlphaInstrInfo.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/Alpha/AlphaInstrInfo.cpp b/lib/Target/Alpha/AlphaInstrInfo.cpp
index 6f96ff0f1e..a602770eca 100644
--- a/lib/Target/Alpha/AlphaInstrInfo.cpp
+++ b/lib/Target/Alpha/AlphaInstrInfo.cpp
@@ -194,7 +194,7 @@ void AlphaInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
else
abort();
MachineInstrBuilder MIB =
- BuildMI(get(Opc)).addReg(SrcReg, false, false, isKill);
+ BuildMI(MF, get(Opc)).addReg(SrcReg, false, false, isKill);
for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
MachineOperand &MO = Addr[i];
if (MO.isRegister())
@@ -239,7 +239,7 @@ void AlphaInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
else
abort();
MachineInstrBuilder MIB =
- BuildMI(get(Opc), DestReg);
+ BuildMI(MF, get(Opc), DestReg);
for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
MachineOperand &MO = Addr[i];
if (MO.isRegister())
@@ -272,7 +272,7 @@ MachineInstr *AlphaInstrInfo::foldMemoryOperand(MachineFunction &MF,
bool isKill = MI->getOperand(1).isKill();
Opc = (Opc == Alpha::BISr) ? Alpha::STQ :
((Opc == Alpha::CPYSS) ? Alpha::STS : Alpha::STT);
- NewMI = BuildMI(get(Opc)).addReg(InReg, false, false, isKill)
+ NewMI = BuildMI(MF, get(Opc)).addReg(InReg, false, false, isKill)
.addFrameIndex(FrameIndex)
.addReg(Alpha::F31);
} else { // load -> move
@@ -280,7 +280,7 @@ MachineInstr *AlphaInstrInfo::foldMemoryOperand(MachineFunction &MF,
bool isDead = MI->getOperand(0).isDead();
Opc = (Opc == Alpha::BISr) ? Alpha::LDQ :
((Opc == Alpha::CPYSS) ? Alpha::LDS : Alpha::LDT);
- NewMI = BuildMI(get(Opc)).addReg(OutReg, true, false, false, isDead)
+ NewMI = BuildMI(MF, get(Opc)).addReg(OutReg, true, false, false, isDead)
.addFrameIndex(FrameIndex)
.addReg(Alpha::F31);
}