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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2009-08-02 17:32:10 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2009-08-02 17:32:10 +0000 |
commit | d950941e138455ebcd7a5f55805dcb977892e3e3 (patch) | |
tree | f9732e3dd797f8f76f0c886f57f295daeb1f1a92 /lib/Target/Blackfin/BlackfinISelLowering.h | |
parent | 4ea480499c40cd7e28bf35cacda33ccbab2aab07 (diff) | |
download | llvm-d950941e138455ebcd7a5f55805dcb977892e3e3.tar.gz llvm-d950941e138455ebcd7a5f55805dcb977892e3e3.tar.bz2 llvm-d950941e138455ebcd7a5f55805dcb977892e3e3.tar.xz |
Analog Devices Blackfin back-end.
Generate code for the Blackfin family of DSPs from Analog Devices:
http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html
We aim to be compatible with the exsisting GNU toolchain found at:
http://blackfin.uclinux.org/gf/project/toolchain
The back-end is experimental.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77897 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Blackfin/BlackfinISelLowering.h')
-rw-r--r-- | lib/Target/Blackfin/BlackfinISelLowering.h | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/lib/Target/Blackfin/BlackfinISelLowering.h b/lib/Target/Blackfin/BlackfinISelLowering.h new file mode 100644 index 0000000000..7acbd1a8e5 --- /dev/null +++ b/lib/Target/Blackfin/BlackfinISelLowering.h @@ -0,0 +1,61 @@ +//===- BlackfinISelLowering.h - Blackfin DAG Lowering Interface -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the interfaces that Blackfin uses to lower LLVM code into a +// selection DAG. +// +//===----------------------------------------------------------------------===// + +#ifndef BLACKFIN_ISELLOWERING_H +#define BLACKFIN_ISELLOWERING_H + +#include "llvm/Target/TargetLowering.h" +#include "Blackfin.h" + +namespace llvm { + + namespace BFISD { + enum { + FIRST_NUMBER = ISD::BUILTIN_OP_END, + CALL, // A call instruction. + RET_FLAG, // Return with a flag operand. + Wrapper // Address wrapper + }; + } + + class BlackfinTargetLowering : public TargetLowering { + int VarArgsFrameOffset; // Frame offset to start of varargs area. + public: + BlackfinTargetLowering(TargetMachine &TM); + virtual MVT getSetCCResultType(MVT VT) const; + virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG); + + int getVarArgsFrameOffset() const { return VarArgsFrameOffset; } + + ConstraintType getConstraintType(const std::string &Constraint) const; + std::pair<unsigned, const TargetRegisterClass*> + getRegForInlineAsmConstraint(const std::string &Constraint, MVT VT) const; + std::vector<unsigned> + getRegClassForInlineAsmConstraint(const std::string &Constraint, + MVT VT) const; + virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; + const char *getTargetNodeName(unsigned Opcode) const; + unsigned getFunctionAlignment(const Function *F) const; + + private: + SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG); + SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG); + SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG); + SDValue LowerRET(SDValue Op, SelectionDAG &DAG); + SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); + SDValue LowerADDE(SDValue Op, SelectionDAG &DAG); + }; +} // end namespace llvm + +#endif // BLACKFIN_ISELLOWERING_H |