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author | Evan Cheng <evan.cheng@apple.com> | 2011-07-18 20:57:22 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2011-07-18 20:57:22 +0000 |
commit | 0e6a052331f674dd70e28af41f654a7874405eab (patch) | |
tree | 5b2a153966b9f7585e2c882d1d34f97d108d54f2 /lib/Target/Blackfin | |
parent | 1360bc8eb029d51d426c77c4b1410849ff308893 (diff) | |
download | llvm-0e6a052331f674dd70e28af41f654a7874405eab.tar.gz llvm-0e6a052331f674dd70e28af41f654a7874405eab.tar.bz2 llvm-0e6a052331f674dd70e28af41f654a7874405eab.tar.xz |
Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down
to MCRegisterInfo. Also initialize the mapping at construction time.
This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135424 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Blackfin')
-rw-r--r-- | lib/Target/Blackfin/BlackfinRegisterInfo.cpp | 17 | ||||
-rw-r--r-- | lib/Target/Blackfin/BlackfinRegisterInfo.h | 4 | ||||
-rw-r--r-- | lib/Target/Blackfin/MCTargetDesc/BlackfinMCTargetDesc.cpp | 10 |
3 files changed, 11 insertions, 20 deletions
diff --git a/lib/Target/Blackfin/BlackfinRegisterInfo.cpp b/lib/Target/Blackfin/BlackfinRegisterInfo.cpp index 3a7c104ee0..e29bc5c9db 100644 --- a/lib/Target/Blackfin/BlackfinRegisterInfo.cpp +++ b/lib/Target/Blackfin/BlackfinRegisterInfo.cpp @@ -37,7 +37,7 @@ using namespace llvm; BlackfinRegisterInfo::BlackfinRegisterInfo(BlackfinSubtarget &st, const TargetInstrInfo &tii) - : BlackfinGenRegisterInfo(), Subtarget(st), TII(tii) {} + : BlackfinGenRegisterInfo(BF::RETS), Subtarget(st), TII(tii) {} const unsigned* BlackfinRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { @@ -327,10 +327,6 @@ BlackfinRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, } } -unsigned BlackfinRegisterInfo::getRARegister() const { - return BF::RETS; -} - unsigned BlackfinRegisterInfo::getFrameRegister(const MachineFunction &MF) const { const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); @@ -347,14 +343,3 @@ unsigned BlackfinRegisterInfo::getEHHandlerRegister() const { llvm_unreachable("What is the exception handler register"); return 0; } - -int BlackfinRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { - llvm_unreachable("What is the dwarf register number"); - return -1; -} - -int BlackfinRegisterInfo::getLLVMRegNum(unsigned DwarfRegNum, - bool isEH) const { - llvm_unreachable("What is the dwarf register number"); - return -1; -} diff --git a/lib/Target/Blackfin/BlackfinRegisterInfo.h b/lib/Target/Blackfin/BlackfinRegisterInfo.h index 86f45c17c6..6ac22af793 100644 --- a/lib/Target/Blackfin/BlackfinRegisterInfo.h +++ b/lib/Target/Blackfin/BlackfinRegisterInfo.h @@ -53,15 +53,11 @@ namespace llvm { int SPAdj, RegScavenger *RS = NULL) const; unsigned getFrameRegister(const MachineFunction &MF) const; - unsigned getRARegister() const; // Exception handling queries. unsigned getEHExceptionRegister() const; unsigned getEHHandlerRegister() const; - int getDwarfRegNum(unsigned RegNum, bool isEH) const; - int getLLVMRegNum(unsigned RegNum, bool isEH) const; - // Utility functions void adjustRegister(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, diff --git a/lib/Target/Blackfin/MCTargetDesc/BlackfinMCTargetDesc.cpp b/lib/Target/Blackfin/MCTargetDesc/BlackfinMCTargetDesc.cpp index 0fa1471ae3..57fd7236c6 100644 --- a/lib/Target/Blackfin/MCTargetDesc/BlackfinMCTargetDesc.cpp +++ b/lib/Target/Blackfin/MCTargetDesc/BlackfinMCTargetDesc.cpp @@ -41,6 +41,16 @@ extern "C" void LLVMInitializeBlackfinMCInstrInfo() { createBlackfinMCInstrInfo); } +static MCRegisterInfo *createBlackfinMCRegisterInfo(StringRef TT) { + MCRegisterInfo *X = new MCRegisterInfo(); + InitBlackfinMCRegisterInfo(X, BF::RETS); + return X; +} + +extern "C" void LLVMInitializeBlackfinMCRegisterInfo() { + TargetRegistry::RegisterMCRegInfo(TheBlackfinTarget, + createBlackfinMCRegisterInfo); +} static MCSubtargetInfo *createBlackfinMCSubtargetInfo(StringRef TT, StringRef CPU, |