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author | Dan Gohman <gohman@apple.com> | 2008-07-27 21:46:04 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-07-27 21:46:04 +0000 |
commit | 475871a144eb604ddaf37503397ba0941442e5fb (patch) | |
tree | adeddbc1f7871c2215b6ca4d9d914eee53a33961 /lib/Target/CellSPU/SPUISelLowering.h | |
parent | 8968450305c28444edc3c272d8752a8db0c2f34a (diff) | |
download | llvm-475871a144eb604ddaf37503397ba0941442e5fb.tar.gz llvm-475871a144eb604ddaf37503397ba0941442e5fb.tar.bz2 llvm-475871a144eb604ddaf37503397ba0941442e5fb.tar.xz |
Rename SDOperand to SDValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPUISelLowering.h')
-rw-r--r-- | lib/Target/CellSPU/SPUISelLowering.h | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/lib/Target/CellSPU/SPUISelLowering.h b/lib/Target/CellSPU/SPUISelLowering.h index 5c41c29c51..814c9ba97a 100644 --- a/lib/Target/CellSPU/SPUISelLowering.h +++ b/lib/Target/CellSPU/SPUISelLowering.h @@ -78,18 +78,18 @@ namespace llvm { /// Predicates that are used for node matching: namespace SPU { - SDOperand get_vec_u18imm(SDNode *N, SelectionDAG &DAG, + SDValue get_vec_u18imm(SDNode *N, SelectionDAG &DAG, MVT ValueType); - SDOperand get_vec_i16imm(SDNode *N, SelectionDAG &DAG, + SDValue get_vec_i16imm(SDNode *N, SelectionDAG &DAG, MVT ValueType); - SDOperand get_vec_i10imm(SDNode *N, SelectionDAG &DAG, + SDValue get_vec_i10imm(SDNode *N, SelectionDAG &DAG, MVT ValueType); - SDOperand get_vec_i8imm(SDNode *N, SelectionDAG &DAG, + SDValue get_vec_i8imm(SDNode *N, SelectionDAG &DAG, MVT ValueType); - SDOperand get_ILHUvec_imm(SDNode *N, SelectionDAG &DAG, + SDValue get_ILHUvec_imm(SDNode *N, SelectionDAG &DAG, MVT ValueType); - SDOperand get_v4i32_imm(SDNode *N, SelectionDAG &DAG); - SDOperand get_v2i64_imm(SDNode *N, SelectionDAG &DAG); + SDValue get_v4i32_imm(SDNode *N, SelectionDAG &DAG); + SDValue get_v2i64_imm(SDNode *N, SelectionDAG &DAG); } class SPUTargetMachine; // forward dec'l. @@ -109,15 +109,15 @@ namespace llvm { virtual const char *getTargetNodeName(unsigned Opcode) const; /// getSetCCResultType - Return the ValueType for ISD::SETCC - virtual MVT getSetCCResultType(const SDOperand &) const; + virtual MVT getSetCCResultType(const SDValue &) const; /// LowerOperation - Provide custom lowering hooks for some operations. /// - virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); + virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG); - virtual SDOperand PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; + virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; - virtual void computeMaskedBitsForTargetNode(const SDOperand Op, + virtual void computeMaskedBitsForTargetNode(const SDValue Op, const APInt &Mask, APInt &KnownZero, APInt &KnownOne, @@ -130,8 +130,8 @@ namespace llvm { getRegForInlineAsmConstraint(const std::string &Constraint, MVT VT) const; - void LowerAsmOperandForConstraint(SDOperand Op, char ConstraintLetter, - std::vector<SDOperand> &Ops, + void LowerAsmOperandForConstraint(SDValue Op, char ConstraintLetter, + std::vector<SDValue> &Ops, SelectionDAG &DAG) const; /// isLegalAddressImmediate - Return true if the integer value can be used |