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| author | Scott Michel <scottm@aero.org> | 2008-06-02 22:18:03 +0000 |
|---|---|---|
| committer | Scott Michel <scottm@aero.org> | 2008-06-02 22:18:03 +0000 |
| commit | 8bf61e8c2a39bcf070c39848fea83eda57851ebb (patch) | |
| tree | a73a80f3763205767300ee4a008edd8cc8b17dbf /lib/Target/CellSPU/SPUISelLowering.h | |
| parent | 193c2358507b151ffbca2f0bb6fbfba55b60bdbd (diff) | |
| download | llvm-8bf61e8c2a39bcf070c39848fea83eda57851ebb.tar.gz llvm-8bf61e8c2a39bcf070c39848fea83eda57851ebb.tar.bz2 llvm-8bf61e8c2a39bcf070c39848fea83eda57851ebb.tar.xz | |
Add necessary 64-bit support so that gcc frontend compiles (mostly). Current
issue is operand promotion for setcc/select... but looks like the fundamental
stuff is implemented for CellSPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51884 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPUISelLowering.h')
| -rw-r--r-- | lib/Target/CellSPU/SPUISelLowering.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/Target/CellSPU/SPUISelLowering.h b/lib/Target/CellSPU/SPUISelLowering.h index 3c73aa51c0..5632ee3152 100644 --- a/lib/Target/CellSPU/SPUISelLowering.h +++ b/lib/Target/CellSPU/SPUISelLowering.h @@ -62,8 +62,13 @@ namespace llvm { ROTBYTES_RIGHT_S, ///< Vector rotate right, by bytes, sign fill ROTBYTES_LEFT, ///< Rotate bytes (loads -> ROTQBYI) ROTBYTES_LEFT_CHAINED, ///< Rotate bytes (loads -> ROTQBYI), with chain - FSMBI, ///< Form Select Mask for Bytes, Immediate + ROTBYTES_LEFT_BITS, ///< Rotate bytes left by bit shift count + SELECT_MASK, ///< Select Mask (FSM, FSMB, FSMH, FSMBI) SELB, ///< Select bits -> (b & mask) | (a & ~mask) + ADD_EXTENDED, ///< Add extended, with carry + CARRY_GENERATE, ///< Carry generate for ADD_EXTENDED + SUB_EXTENDED, ///< Subtract extended, with borrow + BORROW_GENERATE, ///< Borrow generate for SUB_EXTENDED FPInterp, ///< Floating point interpolate FPRecipEst, ///< Floating point reciprocal estimate SEXT32TO64, ///< Sign-extended 32-bit const -> 64-bits |