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author | Scott Michel <scottm@aero.org> | 2009-01-15 04:41:47 +0000 |
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committer | Scott Michel <scottm@aero.org> | 2009-01-15 04:41:47 +0000 |
commit | 94bd57e154088f2d45c465e73f896f64f6da4ade (patch) | |
tree | 54cfa11f05e8040e9d7d18949bbeb5d23ecfce5e /lib/Target/CellSPU/SPUISelLowering.h | |
parent | f9b1d79a549269f0630edd4893c654953ae07a6a (diff) | |
download | llvm-94bd57e154088f2d45c465e73f896f64f6da4ade.tar.gz llvm-94bd57e154088f2d45c465e73f896f64f6da4ade.tar.bz2 llvm-94bd57e154088f2d45c465e73f896f64f6da4ade.tar.xz |
- Convert remaining i64 custom lowering into custom instruction emission
sequences in SPUDAGToDAGISel.cpp and SPU64InstrInfo.td, killing custom
DAG node types as needed.
- i64 mul is now a legal instruction, but emits an instruction sequence
that stretches tblgen and the imagination, as well as violating laws of
several small countries and most southern US states (just kidding, but
looking at a function with 80+ parameters is really weird and just plain
wrong.)
- Update tests as needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62254 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPUISelLowering.h')
-rw-r--r-- | lib/Target/CellSPU/SPUISelLowering.h | 25 |
1 files changed, 21 insertions, 4 deletions
diff --git a/lib/Target/CellSPU/SPUISelLowering.h b/lib/Target/CellSPU/SPUISelLowering.h index 24b8f82ecb..a98a8f6bbe 100644 --- a/lib/Target/CellSPU/SPUISelLowering.h +++ b/lib/Target/CellSPU/SPUISelLowering.h @@ -52,10 +52,11 @@ namespace llvm { ROTBYTES_LEFT_BITS, ///< Rotate bytes left by bit shift count SELECT_MASK, ///< Select Mask (FSM, FSMB, FSMH, FSMBI) SELB, ///< Select bits -> (b & mask) | (a & ~mask) - ADD_EXTENDED, ///< Add extended, with carry - CARRY_GENERATE, ///< Carry generate for ADD_EXTENDED - SUB_EXTENDED, ///< Subtract extended, with borrow - BORROW_GENERATE, ///< Borrow generate for SUB_EXTENDED + // Markers: These aren't used to generate target-dependent nodes, but + // are used during instruction selection. + ADD64_MARKER, ///< i64 addition marker + SUB64_MARKER, ///< i64 subtraction marker + MUL64_MARKER, ///< i64 multiply marker LAST_SPUISD ///< Last user-defined instruction }; } @@ -74,6 +75,12 @@ namespace llvm { MVT ValueType); SDValue get_v4i32_imm(SDNode *N, SelectionDAG &DAG); SDValue get_v2i64_imm(SDNode *N, SelectionDAG &DAG); + + SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG, + const SPUTargetMachine &TM); + + SDValue getBorrowGenerateShufMask(SelectionDAG &DAG); + SDValue getCarryGenerateShufMask(SelectionDAG &DAG); } class SPUTargetMachine; // forward dec'l. @@ -86,8 +93,18 @@ namespace llvm { SPUTargetMachine &SPUTM; public: + //! The venerable constructor + /*! + This is where the CellSPU backend sets operation handling (i.e., legal, + custom, expand or promote.) + */ SPUTargetLowering(SPUTargetMachine &TM); + //! Get the target machine + SPUTargetMachine &getSPUTargetMachine() { + return SPUTM; + } + /// getTargetNodeName() - This method returns the name of a target specific /// DAG node. virtual const char *getTargetNodeName(unsigned Opcode) const; |