Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126518 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 4 insertions, 2 deletions

diff --git a/lib/Target/CellSPU/SPUISelLowering.h b/lib/Target/CellSPU/SPUISelLowering.h
index 95d44afe37..dd48d7bafa 100644
--- a/lib/Target/CellSPU/SPUISelLowering.h
+++ b/lib/Target/CellSPU/SPUISelLowering.h
@@ -109,6 +109,8 @@ namespace llvm {
     /// getSetCCResultType - Return the ValueType for ISD::SETCC
     virtual MVT::SimpleValueType getSetCCResultType(EVT VT) const;
 
+    virtual MVT getShiftAmountTy(EVT LHSTy) const { return MVT::i32; }
+
     //! Custom lowering hooks
     virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
 
@@ -179,9 +181,9 @@ namespace llvm {
 
     virtual bool isLegalICmpImmediate(int64_t Imm) const;
 
-    virtual bool isLegalAddressingMode(const AddrMode &AM, 
+    virtual bool isLegalAddressingMode(const AddrMode &AM,
                                        const Type *Ty) const;
- 
+
     /// After allocating this many registers, the allocator should feel
     /// register pressure. The value is a somewhat random guess, based on the
     /// number of non callee saved registers in the C calling convention.