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| author | Scott Michel <scottm@aero.org> | 2007-12-17 22:32:34 +0000 |
|---|---|---|
| committer | Scott Michel <scottm@aero.org> | 2007-12-17 22:32:34 +0000 |
| commit | 504c369213efb263136bb048e79af3516511c040 (patch) | |
| tree | 32f86dfeb76547a17e9e196cfffd8c48c50de3f3 /lib/Target/CellSPU/SPURegisterInfo.cpp | |
| parent | 8f559ef8201df637706247d7e0394ade63f9a026 (diff) | |
| download | llvm-504c369213efb263136bb048e79af3516511c040.tar.gz llvm-504c369213efb263136bb048e79af3516511c040.tar.bz2 llvm-504c369213efb263136bb048e79af3516511c040.tar.xz | |
- Restore some i8 functionality in CellSPU
- New test case: nand.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45130 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPURegisterInfo.cpp')
| -rw-r--r-- | lib/Target/CellSPU/SPURegisterInfo.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/lib/Target/CellSPU/SPURegisterInfo.cpp b/lib/Target/CellSPU/SPURegisterInfo.cpp index af2a270472..7822d1e3b8 100644 --- a/lib/Target/CellSPU/SPURegisterInfo.cpp +++ b/lib/Target/CellSPU/SPURegisterInfo.cpp @@ -328,7 +328,9 @@ void SPURegisterInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, /* do what loadRegFromStackSlot does here... */ } else { unsigned Opc = 0; - if (RC == SPU::R16CRegisterClass) { + if (RC == SPU::R8CRegisterClass) { + /* do brilliance here */ + } else if (RC == SPU::R16CRegisterClass) { /* Opc = PPC::LWZ; */ } else if (RC == SPU::R32CRegisterClass) { /* Opc = PPC::LD; */ @@ -369,10 +371,9 @@ void SPURegisterInfo::copyRegToReg(MachineBasicBlock &MBB, abort(); } - /* if (DestRC == SPU::R8CRegisterClass) { + if (DestRC == SPU::R8CRegisterClass) { BuildMI(MBB, MI, TII.get(SPU::ORBIr8), DestReg).addReg(SrcReg).addImm(0); - } else */ - if (DestRC == SPU::R16CRegisterClass) { + } else if (DestRC == SPU::R16CRegisterClass) { BuildMI(MBB, MI, TII.get(SPU::ORHIr16), DestReg).addReg(SrcReg).addImm(0); } else if (DestRC == SPU::R32CRegisterClass) { BuildMI(MBB, MI, TII.get(SPU::ORIr32), DestReg).addReg(SrcReg).addImm(0); |