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| author | Chris Lattner <sabre@nondot.org> | 2007-12-30 20:49:49 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2007-12-30 20:49:49 +0000 |
| commit | 9a1ceaedc282f0cae31f2723f4d6c00c7b88fe90 (patch) | |
| tree | 87d9f35ded3a067f2d7aa4d17bfe0e362fb0f17d /lib/Target/CellSPU/SPURegisterInfo.cpp | |
| parent | a9d059693b0bfdaa27bad71c2b0769beaf6ee7dd (diff) | |
| download | llvm-9a1ceaedc282f0cae31f2723f4d6c00c7b88fe90.tar.gz llvm-9a1ceaedc282f0cae31f2723f4d6c00c7b88fe90.tar.bz2 llvm-9a1ceaedc282f0cae31f2723f4d6c00c7b88fe90.tar.xz | |
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45453 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPURegisterInfo.cpp')
| -rw-r--r-- | lib/Target/CellSPU/SPURegisterInfo.cpp | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/lib/Target/CellSPU/SPURegisterInfo.cpp b/lib/Target/CellSPU/SPURegisterInfo.cpp index 8a85e742b0..f344da28c3 100644 --- a/lib/Target/CellSPU/SPURegisterInfo.cpp +++ b/lib/Target/CellSPU/SPURegisterInfo.cpp @@ -263,11 +263,11 @@ void SPURegisterInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, for (unsigned i = 0, e = Addr.size(); i != e; ++i) { MachineOperand &MO = Addr[i]; if (MO.isRegister()) - MIB.addReg(MO.getReg()); + MIB.addReg(MO.getReg()); else if (MO.isImmediate()) - MIB.addImm(MO.getImmedValue()); + MIB.addImm(MO.getImm()); else - MIB.addFrameIndex(MO.getFrameIndex()); + MIB.addFrameIndex(MO.getFrameIndex()); } NewMIs.push_back(MIB); } @@ -349,11 +349,11 @@ void SPURegisterInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, for (unsigned i = 0, e = Addr.size(); i != e; ++i) { MachineOperand &MO = Addr[i]; if (MO.isRegister()) - MIB.addReg(MO.getReg()); + MIB.addReg(MO.getReg()); else if (MO.isImmediate()) - MIB.addImm(MO.getImmedValue()); + MIB.addImm(MO.getImm()); else - MIB.addFrameIndex(MO.getFrameIndex()); + MIB.addFrameIndex(MO.getFrameIndex()); } NewMIs.push_back(MIB); } @@ -610,10 +610,9 @@ SPURegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, MachineOperand &MO = MI.getOperand(OpNo); // Offset is biased by $lr's slot at the bottom. - Offset += MO.getImmedValue() + MFI->getStackSize() - + SPUFrameInfo::minStackSize(); + Offset += MO.getImm() + MFI->getStackSize() + SPUFrameInfo::minStackSize(); assert((Offset & 0xf) == 0 - && "16-byte alignment violated in SPURegisterInfo::eliminateFrameIndex"); + && "16-byte alignment violated in eliminateFrameIndex"); // Replace the FrameIndex with base register with $sp (aka $r1) SPOp.ChangeToRegister(SPU::R1, false); |