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| author | Benjamin Kramer <benny.kra@googlemail.com> | 2012-06-02 10:20:22 +0000 |
|---|---|---|
| committer | Benjamin Kramer <benny.kra@googlemail.com> | 2012-06-02 10:20:22 +0000 |
| commit | d9b0b025612992a0b724eeca8bdf10b1d7a5c355 (patch) | |
| tree | 5891fbafa37ccd7f2f26f9c366396e284e567add /lib/Target/Hexagon/HexagonISelLowering.cpp | |
| parent | 43eb31bfae470b33bab9a6764b98b5e8a0beeda5 (diff) | |
| download | llvm-d9b0b025612992a0b724eeca8bdf10b1d7a5c355.tar.gz llvm-d9b0b025612992a0b724eeca8bdf10b1d7a5c355.tar.bz2 llvm-d9b0b025612992a0b724eeca8bdf10b1d7a5c355.tar.xz | |
Fix typos found by http://github.com/lyda/misspell-check
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157885 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonISelLowering.cpp')
| -rw-r--r-- | lib/Target/Hexagon/HexagonISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Hexagon/HexagonISelLowering.cpp b/lib/Target/Hexagon/HexagonISelLowering.cpp index 1fa1d10009..7505617221 100644 --- a/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -508,7 +508,7 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, // Build a sequence of copy-to-reg nodes chained together with token // chain and flag operands which copy the outgoing args into registers. - // The InFlag in necessary since all emited instructions must be + // The InFlag in necessary since all emitted instructions must be // stuck together. SDValue InFlag; if (!isTailCall) { @@ -528,7 +528,7 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, // than necessary, because it means that each store effectively depends // on every argument instead of just those arguments it would clobber. // - // Do not flag preceeding copytoreg stuff together with the following stuff. + // Do not flag preceding copytoreg stuff together with the following stuff. InFlag = SDValue(); for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, |