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author | Andrew Trick <atrick@apple.com> | 2012-02-01 22:13:57 +0000 |
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committer | Andrew Trick <atrick@apple.com> | 2012-02-01 22:13:57 +0000 |
commit | ee498d3254b86bceb4f441741e9f442990647ce6 (patch) | |
tree | f2319c428f9e572162a0ca172a573da5ea39bcdf /lib/Target/Hexagon/HexagonInstrInfo.h | |
parent | f18a9a2314542ad3b7a601b86969073519e19b0d (diff) | |
download | llvm-ee498d3254b86bceb4f441741e9f442990647ce6.tar.gz llvm-ee498d3254b86bceb4f441741e9f442990647ce6.tar.bz2 llvm-ee498d3254b86bceb4f441741e9f442990647ce6.tar.xz |
VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).
This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling.
Patch by Sergei Larin!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149547 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonInstrInfo.h')
-rw-r--r-- | lib/Target/Hexagon/HexagonInstrInfo.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/Target/Hexagon/HexagonInstrInfo.h b/lib/Target/Hexagon/HexagonInstrInfo.h index d549c4694b..4f49b1f4b2 100644 --- a/lib/Target/Hexagon/HexagonInstrInfo.h +++ b/lib/Target/Hexagon/HexagonInstrInfo.h @@ -135,6 +135,13 @@ public: isProfitableToDupForIfCvt(MachineBasicBlock &MBB,unsigned NumCycles, const BranchProbability &Probability) const; + virtual DFAPacketizer* + CreateTargetScheduleState(const TargetMachine *TM, + const ScheduleDAG *DAG) const; + + virtual bool isSchedulingBoundary(const MachineInstr *MI, + const MachineBasicBlock *MBB, + const MachineFunction &MF) const; bool isValidOffset(const int Opcode, const int Offset) const; bool isValidAutoIncImm(const EVT VT, const int Offset) const; bool isMemOp(const MachineInstr *MI) const; |