diff options
| author | Sirish Pande <spande@codeaurora.org> | 2012-04-13 20:22:31 +0000 |
|---|---|---|
| committer | Sirish Pande <spande@codeaurora.org> | 2012-04-13 20:22:31 +0000 |
| commit | 8800cada206d6f2eda1d54b2a40f4403e9e522bc (patch) | |
| tree | ae24c725d4fd8fa64d191395689c92787eae358e /lib/Target/Hexagon/HexagonInstrInfo.td | |
| parent | 05a2fea6a51b945bb26cab09bed9295257fad405 (diff) | |
| download | llvm-8800cada206d6f2eda1d54b2a40f4403e9e522bc.tar.gz llvm-8800cada206d6f2eda1d54b2a40f4403e9e522bc.tar.bz2 llvm-8800cada206d6f2eda1d54b2a40f4403e9e522bc.tar.xz | |
Add support for Hexagon Architectural feature, New Value Jump.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154696 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonInstrInfo.td')
| -rw-r--r-- | lib/Target/Hexagon/HexagonInstrInfo.td | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/lib/Target/Hexagon/HexagonInstrInfo.td b/lib/Target/Hexagon/HexagonInstrInfo.td index cf7222a0be..80390dc966 100644 --- a/lib/Target/Hexagon/HexagonInstrInfo.td +++ b/lib/Target/Hexagon/HexagonInstrInfo.td @@ -121,10 +121,10 @@ multiclass CMP32_rr_ri_u9<string OpcStr, PatFrag OpNode> { [(set PredRegs:$dst, (OpNode IntRegs:$b, u9ImmPred:$c))]>; } -multiclass CMP32_ri_u9<string OpcStr, PatFrag OpNode> { - def ri : ALU32_ri<(outs PredRegs:$dst), (ins IntRegs:$b, u9Imm:$c), +multiclass CMP32_ri_u8<string OpcStr, PatFrag OpNode> { + def ri : ALU32_ri<(outs PredRegs:$dst), (ins IntRegs:$b, u8Imm:$c), !strconcat("$dst = ", !strconcat(OpcStr, "($b, #$c)")), - [(set PredRegs:$dst, (OpNode IntRegs:$b, u9ImmPred:$c))]>; + [(set PredRegs:$dst, (OpNode IntRegs:$b, u8ImmPred:$c))]>; } multiclass CMP32_ri_s8<string OpcStr, PatFrag OpNode> { @@ -554,9 +554,10 @@ def TFRI_cdnNotPt : ALU32_ri<(outs IntRegs:$dst), (ins PredRegs:$src1, defm CMPGTU : CMP32_rr_ri_u9<"cmp.gtu", setugt>; defm CMPGT : CMP32_rr_ri_s10<"cmp.gt", setgt>; defm CMPLT : CMP32_rr<"cmp.lt", setlt>; +defm CMPLTU : CMP32_rr<"cmp.ltu", setult>; defm CMPEQ : CMP32_rr_ri_s10<"cmp.eq", seteq>; defm CMPGE : CMP32_ri_s8<"cmp.ge", setge>; -defm CMPGEU : CMP32_ri_u9<"cmp.geu", setuge>; +defm CMPGEU : CMP32_ri_u8<"cmp.geu", setuge>; //===----------------------------------------------------------------------===// // ALU32/PRED - //===----------------------------------------------------------------------===// |