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| author | Chandler Carruth <chandlerc@gmail.com> | 2012-04-23 18:25:57 +0000 |
|---|---|---|
| committer | Chandler Carruth <chandlerc@gmail.com> | 2012-04-23 18:25:57 +0000 |
| commit | d410eaba04211d53a523a518a5e315eb24c1072f (patch) | |
| tree | 4f1dce3ce0466afddc686b95b2432690f3086b95 /lib/Target/Hexagon/HexagonIntrinsicsDerived.td | |
| parent | 15e56ad8855ff2d135a79efa71b540852acf3b97 (diff) | |
| download | llvm-d410eaba04211d53a523a518a5e315eb24c1072f.tar.gz llvm-d410eaba04211d53a523a518a5e315eb24c1072f.tar.bz2 llvm-d410eaba04211d53a523a518a5e315eb24c1072f.tar.xz | |
Revert r155365, r155366, and r155367. All three of these have regression
test suite failures. The failures occur at each stage, and only get
worse, so I'm reverting all of them.
Please resubmit these patches, one at a time, after verifying that the
regression test suite passes. Never submit a patch without running the
regression test suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155372 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonIntrinsicsDerived.td')
| -rw-r--r-- | lib/Target/Hexagon/HexagonIntrinsicsDerived.td | 34 |
1 files changed, 12 insertions, 22 deletions
diff --git a/lib/Target/Hexagon/HexagonIntrinsicsDerived.td b/lib/Target/Hexagon/HexagonIntrinsicsDerived.td index 2788101d5a..68eaf68480 100644 --- a/lib/Target/Hexagon/HexagonIntrinsicsDerived.td +++ b/lib/Target/Hexagon/HexagonIntrinsicsDerived.td @@ -12,28 +12,18 @@ // Optimized with intrinisics accumulates // def : Pat <(mul DoubleRegs:$src1, DoubleRegs:$src2), - (i64 - (COMBINE_rr - (HEXAGON_M2_maci - (HEXAGON_M2_maci - (i32 - (EXTRACT_SUBREG - (i64 - (MPYU64 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), - subreg_loreg)), - (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), - subreg_loreg)))), - subreg_hireg)), - (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_loreg)), - (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), subreg_hireg))), - (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), subreg_loreg)), - (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_hireg))), - (i32 - (EXTRACT_SUBREG - (i64 - (MPYU64 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_loreg)), - (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), - subreg_loreg)))), subreg_loreg))))>; + (COMBINE_rr + (Hexagon_M2_maci + (Hexagon_M2_maci (EXTRACT_SUBREG (MPYU64 (EXTRACT_SUBREG DoubleRegs:$src1, subreg_loreg), + (EXTRACT_SUBREG DoubleRegs:$src2, subreg_loreg)), + subreg_hireg), + (EXTRACT_SUBREG DoubleRegs:$src1, subreg_loreg), + (EXTRACT_SUBREG DoubleRegs:$src2, subreg_hireg)), + (EXTRACT_SUBREG DoubleRegs:$src2, subreg_loreg), + (EXTRACT_SUBREG DoubleRegs:$src1, subreg_hireg)), + (EXTRACT_SUBREG (MPYU64 (EXTRACT_SUBREG DoubleRegs:$src1, subreg_loreg), + (EXTRACT_SUBREG DoubleRegs:$src2, subreg_loreg)), + subreg_loreg))>; |