summaryrefslogtreecommitdiff
path: root/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
diff options
context:
space:
mode:
authorWesley Peck <peckw@wesleypeck.com>2010-10-21 03:34:22 +0000
committerWesley Peck <peckw@wesleypeck.com>2010-10-21 03:34:22 +0000
commit60e7127e862e359eb1b4694e5161da6dc4c2c397 (patch)
tree3b7b7f394b741cfd7b592c76909062d7a30623a7 /lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
parentd9707e3d852622197133a73dcb788a7fcd364015 (diff)
downloadllvm-60e7127e862e359eb1b4694e5161da6dc4c2c397.tar.gz
llvm-60e7127e862e359eb1b4694e5161da6dc4c2c397.tar.bz2
llvm-60e7127e862e359eb1b4694e5161da6dc4c2c397.tar.xz
Reverting the commit 116986. It was breaking the build on llvm-x86_64-linux though it
compiles on OS X. I'll ensure that it builds on a linux machine before committing again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116991 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp')
-rw-r--r--lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp97
1 files changed, 1 insertions, 96 deletions
diff --git a/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp b/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
index be9de6d5a2..b551b79b29 100644
--- a/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
+++ b/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
@@ -19,10 +19,6 @@
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/ADT/Statistic.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/raw_ostream.h"
using namespace llvm;
@@ -55,91 +51,6 @@ namespace {
char Filler::ID = 0;
} // end of anonymous namespace
-static bool hasImmInstruction( MachineBasicBlock::iterator &candidate ) {
- // Any instruction with an immediate mode operand greater than
- // 16-bits requires an implicit IMM instruction.
- unsigned numOper = candidate->getNumOperands();
- for( unsigned op = 0; op < numOper; ++op ) {
- if( candidate->getOperand(op).isImm() &&
- (candidate->getOperand(op).getImm() & 0xFFFFFFFFFFFF0000LL) != 0 )
- return true;
-
- // FIXME: we could probably check to see if the FP value happens
- // to not need an IMM instruction. For now we just always
- // assume that FP values always do.
- if( candidate->getOperand(op).isFPImm() )
- return true;
- }
-
- return false;
-}
-
-static bool delayHasHazard( MachineBasicBlock::iterator &candidate,
- MachineBasicBlock::iterator &slot ) {
-
- // Loop over all of the operands in the branch instruction
- // and make sure that none of them are defined by the
- // candidate instruction.
- unsigned numOper = slot->getNumOperands();
- for( unsigned op = 0; op < numOper; ++op ) {
- if( !slot->getOperand(op).isReg() ||
- !slot->getOperand(op).isUse() ||
- slot->getOperand(op).isImplicit() )
- continue;
-
- unsigned cnumOper = candidate->getNumOperands();
- for( unsigned cop = 0; cop < cnumOper; ++cop ) {
- if( candidate->getOperand(cop).isReg() &&
- candidate->getOperand(cop).isDef() &&
- candidate->getOperand(cop).getReg() ==
- slot->getOperand(op).getReg() )
- return true;
- }
- }
-
- // There are no hazards between the two instructions
- return false;
-}
-
-static bool usedBeforeDelaySlot( MachineBasicBlock::iterator &candidate,
- MachineBasicBlock::iterator &slot ) {
- MachineBasicBlock::iterator I = candidate;
- for (++I; I != slot; ++I) {
- unsigned numOper = I->getNumOperands();
- for( unsigned op = 0; op < numOper; ++op ) {
- if( I->getOperand(op).isReg() &&
- I->getOperand(op).isUse() ) {
- unsigned reg = I->getOperand(op).getReg();
- unsigned cops = candidate->getNumOperands();
- for( unsigned cop = 0; cop < cops; ++cop ) {
- if( candidate->getOperand(cop).isReg() &&
- candidate->getOperand(cop).isDef() &&
- candidate->getOperand(cop).getReg() == reg )
- return true;
- }
- }
- }
- }
-
- return false;
-}
-
-static MachineBasicBlock::iterator
-findDelayInstr(MachineBasicBlock &MBB,MachineBasicBlock::iterator &slot) {
- MachineBasicBlock::iterator found = MBB.end();
- for (MachineBasicBlock::iterator I = MBB.begin(); I != slot; ++I) {
- TargetInstrDesc desc = I->getDesc();
- if( desc.hasDelaySlot() || desc.isBranch() ||
- desc.mayLoad() || desc. mayStore() ||
- hasImmInstruction(I) || delayHasHazard(I,slot) ||
- usedBeforeDelaySlot(I,slot)) continue;
-
- found = I;
- }
-
- return found;
-}
-
/// runOnMachineBasicBlock - Fill in delay slots for the given basic block.
/// Currently, we fill delay slots with NOPs. We assume there is only one
/// delay slot per delayed instruction.
@@ -148,16 +59,10 @@ bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) {
for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I)
if (I->getDesc().hasDelaySlot()) {
MachineBasicBlock::iterator J = I;
- MachineBasicBlock::iterator D = findDelayInstr(MBB,I);
-
++J;
+ BuildMI(MBB, J, I->getDebugLoc(), TII->get(MBlaze::NOP));
++FilledSlots;
Changed = true;
-
- if( D == MBB.end() )
- BuildMI(MBB, J, I->getDebugLoc(), TII->get(MBlaze::NOP));
- else
- MBB.splice( J, &MBB, D );
}
return Changed;
}