diff options
author | Anton Korobeynikov <asl@math.spbu.ru> | 2010-01-15 21:19:43 +0000 |
---|---|---|
committer | Anton Korobeynikov <asl@math.spbu.ru> | 2010-01-15 21:19:43 +0000 |
commit | 9afb7c5fb3dfbbe207c87f69bc80098b83308785 (patch) | |
tree | 00ee23bb7d5244abcc360e2b60ccea27e75c9a8b /lib/Target/MSP430/MSP430ISelLowering.h | |
parent | 12c71a53b54ce2fae68b9d7c5003dab4d6e2b760 (diff) | |
download | llvm-9afb7c5fb3dfbbe207c87f69bc80098b83308785.tar.gz llvm-9afb7c5fb3dfbbe207c87f69bc80098b83308785.tar.bz2 llvm-9afb7c5fb3dfbbe207c87f69bc80098b83308785.tar.xz |
zext / truncate is free on msp430. Inform codegen about this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93556 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/MSP430/MSP430ISelLowering.h')
-rw-r--r-- | lib/Target/MSP430/MSP430ISelLowering.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/lib/Target/MSP430/MSP430ISelLowering.h b/lib/Target/MSP430/MSP430ISelLowering.h index 4921500d39..6152a055be 100644 --- a/lib/Target/MSP430/MSP430ISelLowering.h +++ b/lib/Target/MSP430/MSP430ISelLowering.h @@ -99,6 +99,23 @@ namespace llvm { std::pair<unsigned, const TargetRegisterClass*> getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const; + /// isTruncateFree - Return true if it's free to truncate a value of type + /// Ty1 to type Ty2. e.g. On msp430 it's free to truncate a i16 value in + /// register R15W to i8 by referencing its sub-register R15B. + virtual bool isTruncateFree(const Type *Ty1, const Type *Ty2) const; + virtual bool isTruncateFree(EVT VT1, EVT VT2) const; + + /// isZExtFree - Return true if any actual instruction that defines a value + /// of type Ty1 implicit zero-extends the value to Ty2 in the result + /// register. This does not necessarily include registers defined in unknown + /// ways, such as incoming arguments, or copies from unknown virtual + /// registers. Also, if isTruncateFree(Ty2, Ty1) is true, this does not + /// necessarily apply to truncate instructions. e.g. on msp430, all + /// instructions that define 8-bit values implicit zero-extend the result + /// out to 16 bits. + virtual bool isZExtFree(const Type *Ty1, const Type *Ty2) const; + virtual bool isZExtFree(EVT VT1, EVT VT2) const; + MachineBasicBlock* EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *BB, DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) const; |