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| author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-11-07 17:15:25 +0000 |
|---|---|---|
| committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-11-07 17:15:25 +0000 |
| commit | 06ac0820a6cefa6896000054d8e4906326c0cce6 (patch) | |
| tree | 1eff001505153a8027814a64d425a15d895338fc /lib/Target/MSP430/MSP430InstrInfo.td | |
| parent | 6534f83ae8c39284ae51fbf478ce0c37d0c892a2 (diff) | |
| download | llvm-06ac0820a6cefa6896000054d8e4906326c0cce6.tar.gz llvm-06ac0820a6cefa6896000054d8e4906326c0cce6.tar.bz2 llvm-06ac0820a6cefa6896000054d8e4906326c0cce6.tar.xz | |
First try of the post-inc operands handling... Not fully worked, though :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86386 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/MSP430/MSP430InstrInfo.td')
| -rw-r--r-- | lib/Target/MSP430/MSP430InstrInfo.td | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/lib/Target/MSP430/MSP430InstrInfo.td b/lib/Target/MSP430/MSP430InstrInfo.td index 6d7b87c362..33e468df56 100644 --- a/lib/Target/MSP430/MSP430InstrInfo.td +++ b/lib/Target/MSP430/MSP430InstrInfo.td @@ -287,6 +287,15 @@ def ADD16rm : Pseudo<(outs GR16:$dst), (ins GR16:$src1, memsrc:$src2), [(set GR16:$dst, (add GR16:$src1, (load addr:$src2))), (implicit SRW)]>; +let mayLoad = 1, hasExtraDefRegAllocReq = 1, +Constraints = "$base = $base_wb, $src1 = $dst" in { +def ADD8rm_POST : Pseudo<(outs GR8:$dst, GR16:$base_wb), (ins GR8:$src1, GR16:$base), + "add.b\t{@$base+, $dst}", []>; +def ADD16rm_POST : Pseudo<(outs GR16:$dst, GR16:$base_wb), (ins GR16:$src1, GR16:$base), + "add.w\t{@$base+, $dst}", []>; +} + + def ADD8ri : Pseudo<(outs GR8:$dst), (ins GR8:$src1, i8imm:$src2), "add.b\t{$src2, $dst}", [(set GR8:$dst, (add GR8:$src1, imm:$src2)), |