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| author | Matheus Almeida <matheus.almeida@imgtec.com> | 2014-03-19 16:29:06 +0000 |
|---|---|---|
| committer | Matheus Almeida <matheus.almeida@imgtec.com> | 2014-03-19 16:29:06 +0000 |
| commit | e7f8a0b47a4a5a342cbea9f845a37452ca93730e (patch) | |
| tree | 48fcded13f6935a656a263fc1c8e054906b2bf70 /lib/Target/Mips/MCTargetDesc | |
| parent | 947fa5b7b7074cca94dcf1a29c58594d889bba1a (diff) | |
| download | llvm-e7f8a0b47a4a5a342cbea9f845a37452ca93730e.tar.gz llvm-e7f8a0b47a4a5a342cbea9f845a37452ca93730e.tar.bz2 llvm-e7f8a0b47a4a5a342cbea9f845a37452ca93730e.tar.xz | |
[mips] 80-column.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204252 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MCTargetDesc')
| -rw-r--r-- | lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h index eabebfe134..161d1eae82 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h +++ b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h @@ -42,14 +42,18 @@ MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII, const MCSubtargetInfo &STI, MCContext &Ctx); -MCAsmBackend *createMipsAsmBackendEB32(const Target &T, const MCRegisterInfo &MRI, - StringRef TT, StringRef CPU); -MCAsmBackend *createMipsAsmBackendEL32(const Target &T, const MCRegisterInfo &MRI, - StringRef TT, StringRef CPU); -MCAsmBackend *createMipsAsmBackendEB64(const Target &T, const MCRegisterInfo &MRI, - StringRef TT, StringRef CPU); -MCAsmBackend *createMipsAsmBackendEL64(const Target &T, const MCRegisterInfo &MRI, - StringRef TT, StringRef CPU); +MCAsmBackend *createMipsAsmBackendEB32(const Target &T, + const MCRegisterInfo &MRI, StringRef TT, + StringRef CPU); +MCAsmBackend *createMipsAsmBackendEL32(const Target &T, + const MCRegisterInfo &MRI, StringRef TT, + StringRef CPU); +MCAsmBackend *createMipsAsmBackendEB64(const Target &T, + const MCRegisterInfo &MRI, StringRef TT, + StringRef CPU); +MCAsmBackend *createMipsAsmBackendEL64(const Target &T, + const MCRegisterInfo &MRI, StringRef TT, + StringRef CPU); MCObjectWriter *createMipsELFObjectWriter(raw_ostream &OS, uint8_t OSABI, |