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author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-09 13:02:27 +0000 |
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committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-09 13:02:27 +0000 |
commit | 70f6f7ee3ee9f80612b5f289c6b3f6ab713eeb95 (patch) | |
tree | e81e1398b6c3988f03f80f49c324dcbd4694c5b0 /lib/Target/Mips/Mips.td | |
parent | a1e2e91de47be2f2d8f1a2a0074b4c8ca3f7994f (diff) | |
download | llvm-70f6f7ee3ee9f80612b5f289c6b3f6ab713eeb95.tar.gz llvm-70f6f7ee3ee9f80612b5f289c6b3f6ab713eeb95.tar.bz2 llvm-70f6f7ee3ee9f80612b5f289c6b3f6ab713eeb95.tar.xz |
[mips] Marked up instructions added in MIPS-III and tested that IAS for -mcpu=mips[12] does not accept them
Summary:
This required a new instruction group representing the 32-bit subset of
MIPS-III that was available in MIPS32
A small number of instructions are correctly rejected but with the wrong error
message. These have been placed in a separate test for now.
There's some obvious InstAlias's that ought to be marked MIPS-III but arent.
This is because they are not currently tested. I intend to catch these with
a final pass through the tablegen records to find tablegen records without
ISA annotations.
Depends on D3674
Reviewers: vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3675
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208408 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips.td')
-rw-r--r-- | lib/Target/Mips/Mips.td | 29 |
1 files changed, 15 insertions, 14 deletions
diff --git a/lib/Target/Mips/Mips.td b/lib/Target/Mips/Mips.td index 32b0915a9b..1149825214 100644 --- a/lib/Target/Mips/Mips.td +++ b/lib/Target/Mips/Mips.td @@ -90,10 +90,23 @@ def FeatureMips1 : SubtargetFeature<"mips1", "MipsArchVersion", "Mips1", def FeatureMips2 : SubtargetFeature<"mips2", "MipsArchVersion", "Mips2", "Mips II ISA Support [highly experimental]", [FeatureMips1]>; +def FeatureMips3_32 : SubtargetFeature<"mips3_32", "HasMips3_32", "true", + "Subset of MIPS-III that is also in MIPS32 " + "[highly experimental]">; +def FeatureMips3 : SubtargetFeature<"mips3", "MipsArchVersion", "Mips3", + "MIPS III ISA Support [highly experimental]", + [FeatureMips2, FeatureMips3_32, + FeatureGP64Bit, FeatureFP64Bit]>; +def FeatureMips4 : SubtargetFeature<"mips4", "MipsArchVersion", + "Mips4", "MIPS IV ISA Support", + [FeatureMips3, FeatureFPIdx, FeatureCondMov]>; +def FeatureMips5 : SubtargetFeature<"mips5", "MipsArchVersion", "Mips5", + "MIPS V ISA Support [highly experimental]", + [FeatureMips4]>; def FeatureMips32 : SubtargetFeature<"mips32", "MipsArchVersion", "Mips32", "Mips32 ISA Support", - [FeatureMips2, FeatureCondMov, - FeatureBitCount]>; + [FeatureMips2, FeatureMips3_32, + FeatureCondMov, FeatureBitCount]>; def FeatureMips32r2 : SubtargetFeature<"mips32r2", "MipsArchVersion", "Mips32r2", "Mips32r2 ISA Support", [FeatureMips32, FeatureSEInReg, FeatureSwap, @@ -103,18 +116,6 @@ def FeatureMips32r6 : SubtargetFeature<"mips32r6", "MipsArchVersion", "Mips32r6 ISA Support [experimental]", [FeatureMips32r2, FeatureFP64Bit, FeatureNaN2008]>; -// FIXME: Need to check whether FPIdx belongs in the MIPS-III or MIPS-IV Implies -// list but for now it doesn't matter since FPIdx isn't actually attached -// to any instructions. -def FeatureMips3 : SubtargetFeature<"mips3", "MipsArchVersion", "Mips3", - "MIPS III ISA Support [highly experimental]", - [FeatureMips2, FeatureGP64Bit, FeatureFP64Bit]>; -def FeatureMips4 : SubtargetFeature<"mips4", "MipsArchVersion", - "Mips4", "MIPS IV ISA Support", - [FeatureMips3, FeatureFPIdx, FeatureCondMov]>; -def FeatureMips5 : SubtargetFeature<"mips5", "MipsArchVersion", "Mips5", - "MIPS V ISA Support [highly experimental]", - [FeatureMips4]>; def FeatureMips64 : SubtargetFeature<"mips64", "MipsArchVersion", "Mips64", "Mips64 ISA Support", [FeatureMips5, FeatureMips32, FeatureFPIdx]>; |