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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-04-05 03:10:20 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-04-05 03:10:20 +0000 |
commit | fddb7667ca4d8fe83f96b388295849281ddaa5b4 (patch) | |
tree | fdfe17e6a728d6560f0217760d6e3dd80ca924ed /lib/Target/Mips/Mips.td | |
parent | ba79d72eab446e64d360e8263d77732b5e13d556 (diff) | |
download | llvm-fddb7667ca4d8fe83f96b388295849281ddaa5b4.tar.gz llvm-fddb7667ca4d8fe83f96b388295849281ddaa5b4.tar.bz2 llvm-fddb7667ca4d8fe83f96b388295849281ddaa5b4.tar.xz |
Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.
When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.
This works well because TableGen resolves member references late:
class I : Instruction {
AddrMode AM = AddrModeNone;
let TSFlags{3-0} = AM.Value;
}
let AM = AddrMode4 in
def ADD : I;
TSFlags gets the expected bits from AddrMode4 in this example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100384 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips.td')
-rw-r--r-- | lib/Target/Mips/Mips.td | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/lib/Target/Mips/Mips.td b/lib/Target/Mips/Mips.td index 79a78d86ae..aa036aef83 100644 --- a/lib/Target/Mips/Mips.td +++ b/lib/Target/Mips/Mips.td @@ -24,10 +24,7 @@ include "MipsSchedule.td" include "MipsInstrInfo.td" include "MipsCallingConv.td" -def MipsInstrInfo : InstrInfo { - let TSFlagsFields = []; - let TSFlagsShifts = []; -} +def MipsInstrInfo : InstrInfo; //===----------------------------------------------------------------------===// // Mips Subtarget features // |