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author | Bill Wendling <isanbard@gmail.com> | 2013-06-07 07:04:14 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2013-06-07 07:04:14 +0000 |
commit | 41e632d9e1a55d36cb08b0551ad82a13d9137a5e (patch) | |
tree | 52d4b47f777e9928012d6028eefa27bedf9f4a12 /lib/Target/Mips/Mips16RegisterInfo.cpp | |
parent | ed8b5b55a4416286758c5567c2602d2c7d0be585 (diff) | |
download | llvm-41e632d9e1a55d36cb08b0551ad82a13d9137a5e.tar.gz llvm-41e632d9e1a55d36cb08b0551ad82a13d9137a5e.tar.bz2 llvm-41e632d9e1a55d36cb08b0551ad82a13d9137a5e.tar.xz |
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183493 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips16RegisterInfo.cpp')
-rw-r--r-- | lib/Target/Mips/Mips16RegisterInfo.cpp | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/lib/Target/Mips/Mips16RegisterInfo.cpp b/lib/Target/Mips/Mips16RegisterInfo.cpp index 4756b1e84d..018f56c06a 100644 --- a/lib/Target/Mips/Mips16RegisterInfo.cpp +++ b/lib/Target/Mips/Mips16RegisterInfo.cpp @@ -41,9 +41,8 @@ using namespace llvm; -Mips16RegisterInfo::Mips16RegisterInfo(const MipsSubtarget &ST, - const Mips16InstrInfo &I) - : MipsRegisterInfo(ST), TII(I) {} +Mips16RegisterInfo::Mips16RegisterInfo(const MipsSubtarget &ST) + : MipsRegisterInfo(ST) {} bool Mips16RegisterInfo::requiresRegisterScavenging (const MachineFunction &MF) const { @@ -66,6 +65,7 @@ bool Mips16RegisterInfo::saveScavengerRegister const TargetRegisterClass *RC, unsigned Reg) const { DebugLoc DL; + const TargetInstrInfo &TII = *MBB.getParent()->getTarget().getInstrInfo(); TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true); TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true); return true; @@ -139,6 +139,9 @@ void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II, MachineBasicBlock &MBB = *MI.getParent(); DebugLoc DL = II->getDebugLoc(); unsigned NewImm; + const Mips16InstrInfo &TII = + *static_cast<const Mips16InstrInfo*>( + MBB.getParent()->getTarget().getInstrInfo()); FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm); Offset = SignExtend64<16>(NewImm); IsKill = true; |