diff options
| author | Akira Hatanaka <ahatanaka@mips.com> | 2013-03-29 19:17:42 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-03-29 19:17:42 +0000 |
| commit | 5114226c1896f250be8881adf67d55a7e54b50fc (patch) | |
| tree | 864ab74576a53000854484b62fd87ba319a1b698 /lib/Target/Mips/Mips16RegisterInfo.cpp | |
| parent | bc4de7cec1b87fd84e6dad2c512c927d67967a22 (diff) | |
| download | llvm-5114226c1896f250be8881adf67d55a7e54b50fc.tar.gz llvm-5114226c1896f250be8881adf67d55a7e54b50fc.tar.bz2 llvm-5114226c1896f250be8881adf67d55a7e54b50fc.tar.xz | |
[mips] Define a function which returns the GPR register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178359 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips16RegisterInfo.cpp')
| -rw-r--r-- | lib/Target/Mips/Mips16RegisterInfo.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/Mips/Mips16RegisterInfo.cpp b/lib/Target/Mips/Mips16RegisterInfo.cpp index 0ea9368949..6cca227685 100644 --- a/lib/Target/Mips/Mips16RegisterInfo.cpp +++ b/lib/Target/Mips/Mips16RegisterInfo.cpp @@ -72,6 +72,12 @@ bool Mips16RegisterInfo::saveScavengerRegister return true; } +const TargetRegisterClass * +Mips16RegisterInfo::intRegClass(unsigned Size) const { + assert(Size == 4); + return &Mips::CPU16RegsRegClass; +} + void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo, int FrameIndex, uint64_t StackSize, |