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authorReed Kotler <rkotler@mips.com>2013-05-21 22:06:02 +0000
committerReed Kotler <rkotler@mips.com>2013-05-21 22:06:02 +0000
commit6c1301ba8c017e39123e41a3cb5fb6984c0b4766 (patch)
tree4b21109c67e0b256ac33427351e40af9408f885b /lib/Target/Mips/Mips16RegisterInfo.cpp
parentab7abe0c02e40c1cb801ebe6959a8ad58d7604ab (diff)
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Mips16 does not use register scavenger from TargetRegisterInfo. It allocates
a RegScavenger object on it's own. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182430 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips16RegisterInfo.cpp')
-rw-r--r--lib/Target/Mips/Mips16RegisterInfo.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Mips/Mips16RegisterInfo.cpp b/lib/Target/Mips/Mips16RegisterInfo.cpp
index 7ad18f2b4d..4756b1e84d 100644
--- a/lib/Target/Mips/Mips16RegisterInfo.cpp
+++ b/lib/Target/Mips/Mips16RegisterInfo.cpp
@@ -47,11 +47,11 @@ Mips16RegisterInfo::Mips16RegisterInfo(const MipsSubtarget &ST,
bool Mips16RegisterInfo::requiresRegisterScavenging
(const MachineFunction &MF) const {
- return true;
+ return false;
}
bool Mips16RegisterInfo::requiresFrameIndexScavenging
(const MachineFunction &MF) const {
- return true;
+ return false;
}
bool Mips16RegisterInfo::useFPForScavengingIndex