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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-12 15:43:41 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-12 15:43:41 +0000 |
| commit | e44de6afeaf247c07c945e333eac45db4891d680 (patch) | |
| tree | 67044bb0014fd5d373ecdf957ff1fe98490201b5 /lib/Target/Mips/Mips32r6InstrInfo.td | |
| parent | 87010f33a8600d18cd6db9517f33104ca4fca770 (diff) | |
| download | llvm-e44de6afeaf247c07c945e333eac45db4891d680.tar.gz llvm-e44de6afeaf247c07c945e333eac45db4891d680.tar.bz2 llvm-e44de6afeaf247c07c945e333eac45db4891d680.tar.xz | |
Revert: r208582 - [mips][mips64r6] Add sel.s and sel.d
Accidentally committed an unreviewed patch. Reverted it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208583 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips32r6InstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/Mips32r6InstrInfo.td | 17 |
1 files changed, 2 insertions, 15 deletions
diff --git a/lib/Target/Mips/Mips32r6InstrInfo.td b/lib/Target/Mips/Mips32r6InstrInfo.td index 16cd299194..95a22d0052 100644 --- a/lib/Target/Mips/Mips32r6InstrInfo.td +++ b/lib/Target/Mips/Mips32r6InstrInfo.td @@ -68,8 +68,6 @@ class MUH_ENC : SPECIAL_3R_FM<0b00011, 0b011000>; class MUHU_ENC : SPECIAL_3R_FM<0b00011, 0b011001>; class MUL_R6_ENC : SPECIAL_3R_FM<0b00010, 0b011000>; class MULU_ENC : SPECIAL_3R_FM<0b00010, 0b011001>; -class SEL_D_ENC : COP1_SEL_FM<FIELD_FMT_D>; -class SEL_S_ENC : COP1_SEL_FM<FIELD_FMT_S>; //===----------------------------------------------------------------------===// // @@ -101,17 +99,6 @@ class MUHU_DESC : MUL_R6_DESC_BASE<"muhu", GPR32Opnd>; class MUL_R6_DESC : MUL_R6_DESC_BASE<"mul", GPR32Opnd>; class MULU_DESC : MUL_R6_DESC_BASE<"mulu", GPR32Opnd>; -class SEL_DESC_BASE<string instr_asm, RegisterOperand FGROpnd> { - dag OutOperandList = (outs FGROpnd:$fd); - dag InOperandList = (ins FGROpnd:$fd_in, FGROpnd:$fs, FGROpnd:$ft); - string AsmString = !strconcat(instr_asm, "\t$fd, $fs, $ft"); - list<dag> Pattern = []; - string Constraints = "$fd_in = $fd"; -} - -class SEL_D_DESC : SEL_DESC_BASE<"sel.d", FGR64Opnd>; -class SEL_S_DESC : SEL_DESC_BASE<"sel.s", FGR32Opnd>; - //===----------------------------------------------------------------------===// // // Instruction Definitions @@ -185,5 +172,5 @@ def SELEQZ_S; def SELNEZ; def SELNEZ_D; def SELNEZ_S; -def SEL_D : SEL_D_ENC, SEL_D_DESC, ISA_MIPS32R6; -def SEL_S : SEL_S_ENC, SEL_S_DESC, ISA_MIPS32R6; +def SEL_D; +def SEL_S; |