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| author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-05-16 13:40:57 +0000 |
|---|---|---|
| committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-05-16 13:40:57 +0000 |
| commit | fadf07b882d065947e9cc9603374cde72415da64 (patch) | |
| tree | 89b139a55102792b83e83c0ecce3335242a930b8 /lib/Target/Mips/Mips32r6InstrInfo.td | |
| parent | ab67b30df6b14e8e90f4778215ed4e1d5939638e (diff) | |
| download | llvm-fadf07b882d065947e9cc9603374cde72415da64.tar.gz llvm-fadf07b882d065947e9cc9603374cde72415da64.tar.bz2 llvm-fadf07b882d065947e9cc9603374cde72415da64.tar.xz | |
[mips][mips64r6] Add SELEQZ and SELNEZ instructions
Differential Revision: http://reviews.llvm.org/D3743
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208987 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips32r6InstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/Mips32r6InstrInfo.td | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/lib/Target/Mips/Mips32r6InstrInfo.td b/lib/Target/Mips/Mips32r6InstrInfo.td index 7a8cc6f468..4d2d103f88 100644 --- a/lib/Target/Mips/Mips32r6InstrInfo.td +++ b/lib/Target/Mips/Mips32r6InstrInfo.td @@ -129,6 +129,9 @@ class MSUBF_D_ENC : COP1_3R_FM<0b011001, FIELD_FMT_D>; class SEL_D_ENC : COP1_3R_FM<0b010000, FIELD_FMT_D>; class SEL_S_ENC : COP1_3R_FM<0b010000, FIELD_FMT_S>; +class SELEQZ_ENC : SPECIAL_3R_FM<0b00000, 0b110101>; +class SELNEZ_ENC : SPECIAL_3R_FM<0b00000, 0b110111>; + class LWPC_ENC : PCREL19_FM<OPCODE2_LWPC>; class LWUPC_ENC : PCREL19_FM<OPCODE2_LWUPC>; @@ -413,6 +416,16 @@ class COP1_4R_DESC_BASE<string instr_asm, RegisterOperand FGROpnd> { class SEL_D_DESC : COP1_4R_DESC_BASE<"sel.d", FGR64Opnd>; class SEL_S_DESC : COP1_4R_DESC_BASE<"sel.s", FGR32Opnd>; +class SELEQNE_Z_DESC_BASE<string instr_asm, RegisterOperand GPROpnd> { + dag OutOperandList = (outs GPROpnd:$rd); + dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt); + string AsmString = !strconcat(instr_asm, "\t$rd, $rs, $rt"); + list<dag> Pattern = []; +} + +class SELEQZ_DESC : SELEQNE_Z_DESC_BASE<"seleqz", GPR32Opnd>; +class SELNEZ_DESC : SELEQNE_Z_DESC_BASE<"selnez", GPR32Opnd>; + class MADDF_S_DESC : COP1_4R_DESC_BASE<"maddf.s", FGR32Opnd>; class MADDF_D_DESC : COP1_4R_DESC_BASE<"maddf.d", FGR64Opnd>; class MSUBF_S_DESC : COP1_4R_DESC_BASE<"msubf.s", FGR32Opnd>; @@ -529,10 +542,10 @@ def MULU : MULU_ENC, MULU_DESC, ISA_MIPS32R6; def NAL; // BAL with rd=0 def RINT_D : RINT_D_ENC, RINT_D_DESC, ISA_MIPS32R6; def RINT_S : RINT_S_ENC, RINT_S_DESC, ISA_MIPS32R6; -def SELEQZ; +def SELEQZ : SELEQZ_ENC, SELEQZ_DESC, ISA_MIPS32R6; def SELEQZ_D : SELEQZ_D_ENC, SELEQZ_D_DESC, ISA_MIPS32R6; def SELEQZ_S : SELEQZ_S_ENC, SELEQZ_S_DESC, ISA_MIPS32R6; -def SELNEZ; +def SELNEZ : SELNEZ_ENC, SELNEZ_DESC, ISA_MIPS32R6; def SELNEZ_D : SELNEZ_D_ENC, SELNEZ_D_DESC, ISA_MIPS32R6; def SELNEZ_S : SELNEZ_S_ENC, SELNEZ_S_DESC, ISA_MIPS32R6; def SEL_D : SEL_D_ENC, SEL_D_DESC, ISA_MIPS32R6; |