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| author | Akira Hatanaka <ahatanaka@mips.com> | 2011-10-11 19:09:09 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-10-11 19:09:09 +0000 |
| commit | 06f8231bfbdd77d68e7ec7ff2e238c45b3bec0b8 (patch) | |
| tree | 4388f7e0fe73d53439be8b0a99bb55d59f6b6637 /lib/Target/Mips/Mips64InstrInfo.td | |
| parent | 8191f34797d2e3cfedf5cff3e79947c90599f720 (diff) | |
| download | llvm-06f8231bfbdd77d68e7ec7ff2e238c45b3bec0b8.tar.gz llvm-06f8231bfbdd77d68e7ec7ff2e238c45b3bec0b8.tar.bz2 llvm-06f8231bfbdd77d68e7ec7ff2e238c45b3bec0b8.tar.xz | |
Add patterns for conditional branches with 64-bit register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141696 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips64InstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/Mips64InstrInfo.td | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td index d95557a1a4..8c8bc76e4b 100644 --- a/lib/Target/Mips/Mips64InstrInfo.td +++ b/lib/Target/Mips/Mips64InstrInfo.td @@ -237,6 +237,9 @@ def : Pat<(zextloadi32_u addr:$a), (DSRL (DSLL (ULW64 addr:$a), 32), 32)>, // hi/lo relocs def : Pat<(i64 (MipsLo tglobaladdr:$in)), (DADDiu ZERO_64, tglobaladdr:$in)>; +defm : BrcondPats<CPU64Regs, BEQ64, BNE64, SLT64, SLTu64, SLTi64, SLTiu64, + ZERO_64>; + // setcc patterns def : Pat<(seteq CPU64Regs:$lhs, CPU64Regs:$rhs), (SLTu64 (DXOR CPU64Regs:$lhs, CPU64Regs:$rhs), 1)>; |