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| author | Akira Hatanaka <ahatanaka@mips.com> | 2011-10-11 18:49:17 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-10-11 18:49:17 +0000 |
| commit | 3e3427a5c3fe8303723129207ce1864bee8fa481 (patch) | |
| tree | 9af5a422f22d85e558706d5ddc673ff80be51609 /lib/Target/Mips/Mips64InstrInfo.td | |
| parent | 2e350479478ccf809e2142a4f0ad8062342577cc (diff) | |
| download | llvm-3e3427a5c3fe8303723129207ce1864bee8fa481.tar.gz llvm-3e3427a5c3fe8303723129207ce1864bee8fa481.tar.bz2 llvm-3e3427a5c3fe8303723129207ce1864bee8fa481.tar.xz | |
Add support for conditional branch instructions with 64-bit register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141694 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips64InstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/Mips64InstrInfo.td | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td index 83db698e1e..0bdc371e0f 100644 --- a/lib/Target/Mips/Mips64InstrInfo.td +++ b/lib/Target/Mips/Mips64InstrInfo.td @@ -184,6 +184,14 @@ defm USW64 : StoreM64<0x2b, "usw", truncstorei32_u, 1>; defm ULD : LoadM64<0x37, "uld", load_u, 1>; defm USD : StoreM64<0x3f, "usd", store_u, 1>; +/// Jump and Branch Instructions +def BEQ64 : CBranch<0x04, "beq", seteq, CPU64Regs>; +def BNE64 : CBranch<0x05, "bne", setne, CPU64Regs>; +def BGEZ64 : CBranchZero<0x01, 1, "bgez", setge, CPU64Regs>; +def BGTZ64 : CBranchZero<0x07, 0, "bgtz", setgt, CPU64Regs>; +def BLEZ64 : CBranchZero<0x07, 0, "blez", setle, CPU64Regs>; +def BLTZ64 : CBranchZero<0x01, 0, "bltz", setlt, CPU64Regs>; + /// Multiply and Divide Instructions. def DMULT : Mul64<0x1c, "dmult", IIImul>; def DMULTu : Mul64<0x1d, "dmultu", IIImul>; |