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author | Akira Hatanaka <ahatanaka@mips.com> | 2011-09-30 18:51:46 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-09-30 18:51:46 +0000 |
commit | c7bafe9241c0742e71f7fd1b83e0c5b3acee0dac (patch) | |
tree | 94b2daab77201e44a69ed7032f419f772a28aa5b /lib/Target/Mips/Mips64InstrInfo.td | |
parent | cbf676b3ba907f72405a02938f5cd85fb3e6a46c (diff) | |
download | llvm-c7bafe9241c0742e71f7fd1b83e0c5b3acee0dac.tar.gz llvm-c7bafe9241c0742e71f7fd1b83e0c5b3acee0dac.tar.bz2 llvm-c7bafe9241c0742e71f7fd1b83e0c5b3acee0dac.tar.xz |
Add definitions of Mips64 rotate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140870 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips64InstrInfo.td')
-rw-r--r-- | lib/Target/Mips/Mips64InstrInfo.td | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td index c500c1a8fe..6d89a0e47b 100644 --- a/lib/Target/Mips/Mips64InstrInfo.td +++ b/lib/Target/Mips/Mips64InstrInfo.td @@ -116,4 +116,22 @@ def DSRL32 : LogicR_shift_rotate_imm64<0x3e, 0x00, "dsrl32", srl, imm32_63>; def DSRA32 : LogicR_shift_rotate_imm64<0x3f, 0x00, "dsra32", sra, imm32_63>; def DSLLV : LogicR_shift_rotate_reg64<0x24, 0x00, "dsllv", shl>; def DSRLV : LogicR_shift_rotate_reg64<0x26, 0x00, "dsrlv", srl>; -def DSRAV : LogicR_shift_rotate_reg64<0x27, 0x00, "dsrav", sra>;
\ No newline at end of file +def DSRAV : LogicR_shift_rotate_reg64<0x27, 0x00, "dsrav", sra>; + +// Rotate Instructions +let Predicates = [HasMips64r2] in { + def DROTR : LogicR_shift_rotate_imm64<0x3a, 0x01, "drotr", rotr, immZExt5>; + def DROTR32 : LogicR_shift_rotate_imm64<0x3e, 0x01, "drotr32", rotr, + imm32_63>; + def DROTRV : LogicR_shift_rotate_reg64<0x16, 0x01, "drotrv", rotr>; +} + +//===----------------------------------------------------------------------===// +// Arbitrary patterns that map to one or more instructions +//===----------------------------------------------------------------------===// + +// Small immediates +def : Pat<(i64 immSExt16:$in), + (DADDiu ZERO_64, imm:$in)>; +def : Pat<(i64 immZExt16:$in), + (DORi ZERO_64, imm:$in)>; |