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| author | Akira Hatanaka <ahatanaka@mips.com> | 2013-08-19 19:08:03 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-08-19 19:08:03 +0000 |
| commit | 1e09ed13893ad9d463c6c08c996170bac6e60449 (patch) | |
| tree | 017b632e3627c1f19ea6d21587d81f718d8408d7 /lib/Target/Mips/MipsCondMov.td | |
| parent | 630d17566793c7f25a05cd407ab9b79a1756966a (diff) | |
| download | llvm-1e09ed13893ad9d463c6c08c996170bac6e60449.tar.gz llvm-1e09ed13893ad9d463c6c08c996170bac6e60449.tar.bz2 llvm-1e09ed13893ad9d463c6c08c996170bac6e60449.tar.xz | |
[mips] Fix instruction definitions that were incorrectly marked as code-gen-only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188690 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsCondMov.td')
| -rw-r--r-- | lib/Target/Mips/MipsCondMov.td | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/lib/Target/Mips/MipsCondMov.td b/lib/Target/Mips/MipsCondMov.td index b313c52178..1f19adc326 100644 --- a/lib/Target/Mips/MipsCondMov.td +++ b/lib/Target/Mips/MipsCondMov.td @@ -148,15 +148,17 @@ let Predicates = [NotFP64bit, HasStdEnc] in { CMov_I_F_FM<19, 17>; } -let Predicates = [IsFP64bit, HasStdEnc], isCodeGenOnly = 1 in { +let Predicates = [IsFP64bit, HasStdEnc], DecoderNamespace = "Mips64" in { def MOVZ_I_D64 : CMov_I_F_FT<"movz.d", GPR32Opnd, FGR64Opnd, IIFmove>, CMov_I_F_FM<18, 17>; - def MOVZ_I64_D64 : CMov_I_F_FT<"movz.d", GPR64Opnd, FGR64Opnd, - IIFmove>, CMov_I_F_FM<18, 17>; def MOVN_I_D64 : CMov_I_F_FT<"movn.d", GPR32Opnd, FGR64Opnd, IIFmove>, CMov_I_F_FM<19, 17>; - def MOVN_I64_D64 : CMov_I_F_FT<"movn.d", GPR64Opnd, FGR64Opnd, - IIFmove>, CMov_I_F_FM<19, 17>; + let isCodeGenOnly = 1 in { + def MOVZ_I64_D64 : CMov_I_F_FT<"movz.d", GPR64Opnd, FGR64Opnd, + IIFmove>, CMov_I_F_FM<18, 17>; + def MOVN_I64_D64 : CMov_I_F_FT<"movn.d", GPR64Opnd, FGR64Opnd, + IIFmove>, CMov_I_F_FM<19, 17>; + } } def MOVT_I : CMov_F_I_FT<"movt", GPR32Opnd, IIArith, MipsCMovFP_T>, @@ -184,7 +186,8 @@ let Predicates = [NotFP64bit, HasStdEnc] in { def MOVF_D32 : CMov_F_F_FT<"movf.d", AFGR64Opnd, IIFmove, MipsCMovFP_F>, CMov_F_F_FM<17, 0>; } -let Predicates = [IsFP64bit, HasStdEnc], isCodeGenOnly = 1 in { + +let Predicates = [IsFP64bit, HasStdEnc], DecoderNamespace = "Mips64" in { def MOVT_D64 : CMov_F_F_FT<"movt.d", FGR64Opnd, IIFmove, MipsCMovFP_T>, CMov_F_F_FM<17, 1>; def MOVF_D64 : CMov_F_F_FT<"movf.d", FGR64Opnd, IIFmove, MipsCMovFP_F>, |