Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which is

needed to emit a 64-bit gp-relative relocation entry. Make changes necessary
for emitting jump tables which have entries with directive .gpdword. This patch
does not implement the parts needed for direct object emission or JIT.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149668 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 6 insertions, 3 deletions

diff --git a/lib/Target/Mips/MipsInstrInfo.cpp b/lib/Target/Mips/MipsInstrInfo.cpp
index 5797112b8f..a8afe58d76 100644
--- a/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/lib/Target/Mips/MipsInstrInfo.cpp
@@ -469,11 +469,14 @@ unsigned MipsInstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
   MachineBasicBlock::iterator MBBI = FirstMBB.begin();
   MachineRegisterInfo &RegInfo = MF->getRegInfo();
   const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
+  unsigned GP = IsN64 ? Mips::GP_64 : Mips::GP;
+  const TargetRegisterClass *RC
+    = IsN64 ? Mips::CPU64RegsRegisterClass : Mips::CPURegsRegisterClass;
 
-  GlobalBaseReg = RegInfo.createVirtualRegister(Mips::CPURegsRegisterClass);
+  GlobalBaseReg = RegInfo.createVirtualRegister(RC);
   BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),
-          GlobalBaseReg).addReg(Mips::GP);
-  RegInfo.addLiveIn(Mips::GP);
+          GlobalBaseReg).addReg(GP);
+  RegInfo.addLiveIn(GP);
 
   MipsFI->setGlobalBaseReg(GlobalBaseReg);
   return GlobalBaseReg;