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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-12-07 04:23:40 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-12-07 04:23:40 +0000 |
commit | 06180bf3f25f2a9828e4c39f63a883aaa6c9452d (patch) | |
tree | 9ac880b2152aca31c895d048865961373626c904 /lib/Target/Mips/MipsLongBranch.cpp | |
parent | c8ce7a4bb58b9078e1ea0e362b3935f4de501e8f (diff) | |
download | llvm-06180bf3f25f2a9828e4c39f63a883aaa6c9452d.tar.gz llvm-06180bf3f25f2a9828e4c39f63a883aaa6c9452d.tar.bz2 llvm-06180bf3f25f2a9828e4c39f63a883aaa6c9452d.tar.xz |
Use the new MIBundleBuilder class in the Mips target.
This is the preferred way of creating bundled machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169585 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsLongBranch.cpp')
-rw-r--r-- | lib/Target/Mips/MipsLongBranch.cpp | 36 |
1 files changed, 22 insertions, 14 deletions
diff --git a/lib/Target/Mips/MipsLongBranch.cpp b/lib/Target/Mips/MipsLongBranch.cpp index cf43f20283..1d53a1508e 100644 --- a/lib/Target/Mips/MipsLongBranch.cpp +++ b/lib/Target/Mips/MipsLongBranch.cpp @@ -284,9 +284,10 @@ void MipsLongBranch::expandToLongBranch(MBBInfo &I) { .addReg(Mips::SP).addImm(-8); BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)).addReg(Mips::RA) .addReg(Mips::SP).addImm(0); - BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::BAL_BR)).addMBB(BalTgtMBB); - BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LUi), Mips::AT).addImm(Hi) - ->setIsInsideBundle(); + + MIBundleBuilder(*LongBrMBB, Pos) + .append(BuildMI(*MF, DL, TII->get(Mips::BAL_BR)).addMBB(BalTgtMBB)) + .append(BuildMI(*MF, DL, TII->get(Mips::LUi), Mips::AT).addImm(Hi)); Pos = BalTgtMBB->begin(); @@ -296,9 +297,11 @@ void MipsLongBranch::expandToLongBranch(MBBInfo &I) { .addReg(Mips::RA).addReg(Mips::AT); BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA) .addReg(Mips::SP).addImm(0); - BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::JR)).addReg(Mips::AT); - BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) - .addReg(Mips::SP).addImm(8)->setIsInsideBundle(); + + MIBundleBuilder(*BalTgtMBB, Pos) + .append(BuildMI(*MF, DL, TII->get(Mips::JR)).addReg(Mips::AT)) + .append(BuildMI(*MF, DL, TII->get(Mips::ADDiu), Mips::SP) + .addReg(Mips::SP).addImm(8)); } else { // $longbr: // daddiu $sp, $sp, -16 @@ -336,9 +339,11 @@ void MipsLongBranch::expandToLongBranch(MBBInfo &I) { .addReg(Mips::AT_64).addImm(16); BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::AT_64) .addReg(Mips::AT_64).addImm(Hi); - BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::BAL_BR)).addMBB(BalTgtMBB); - BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) - .addReg(Mips::AT_64).addImm(16)->setIsInsideBundle(); + + MIBundleBuilder(*LongBrMBB, Pos) + .append(BuildMI(*MF, DL, TII->get(Mips::BAL_BR)).addMBB(BalTgtMBB)) + .append(BuildMI(*MF, DL, TII->get(Mips::DSLL), Mips::AT_64) + .addReg(Mips::AT_64).addImm(16)); Pos = BalTgtMBB->begin(); @@ -348,9 +353,11 @@ void MipsLongBranch::expandToLongBranch(MBBInfo &I) { .addReg(Mips::RA_64).addReg(Mips::AT_64); BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LD), Mips::RA_64) .addReg(Mips::SP_64).addImm(0); - BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::JR64)).addReg(Mips::AT_64); - BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64) - .addReg(Mips::SP_64).addImm(16)->setIsInsideBundle(); + + MIBundleBuilder(*BalTgtMBB, Pos) + .append(BuildMI(*MF, DL, TII->get(Mips::JR64)).addReg(Mips::AT_64)) + .append(BuildMI(*MF, DL, TII->get(Mips::DADDiu), Mips::SP_64) + .addReg(Mips::SP_64).addImm(16)); } assert(BalTgtMBBSize == BalTgtMBB->size()); @@ -363,8 +370,9 @@ void MipsLongBranch::expandToLongBranch(MBBInfo &I) { // Pos = LongBrMBB->begin(); LongBrMBB->addSuccessor(TgtMBB); - BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::J)).addMBB(TgtMBB); - BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::NOP))->setIsInsideBundle(); + MIBundleBuilder(*LongBrMBB, Pos) + .append(BuildMI(*MF, DL, TII->get(Mips::J)).addMBB(TgtMBB)) + .append(BuildMI(*MF, DL, TII->get(Mips::NOP))); assert(LongBrMBB->size() == LongBranchSeqSize); } |