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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-08-28 12:14:50 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-08-28 12:14:50 +0000 |
| commit | 3c380d5e28f86984b147fcd424736c498773f37e (patch) | |
| tree | 6547be0e03066ec1127d97f804ca339c7bfb3bdb /lib/Target/Mips/MipsMSAInstrFormats.td | |
| parent | 2fd3e67dc6438cee5e32e0d7d7d42891df7edd96 (diff) | |
| download | llvm-3c380d5e28f86984b147fcd424736c498773f37e.tar.gz llvm-3c380d5e28f86984b147fcd424736c498773f37e.tar.bz2 llvm-3c380d5e28f86984b147fcd424736c498773f37e.tar.xz | |
[mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v
These intrinsics are legalized to V(ALL|ANY)_(NON)?ZERO nodes,
are matched as SN?Z_[BHWDV]_PSEUDO pseudo's, and emitted as
a branch/mov sequence to evaluate to 0 or 1.
Note: The resulting code is sub-optimal since it doesnt seem to be possible
to feed the result of an intrinsic directly into a brcond. At the moment
it uses (SETCC (VALL_ZERO $ws), 0, SETEQ) and similar which unnecessarily
evaluates the boolean twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189478 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsMSAInstrFormats.td')
| -rw-r--r-- | lib/Target/Mips/MipsMSAInstrFormats.td | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsMSAInstrFormats.td b/lib/Target/Mips/MipsMSAInstrFormats.td index f337f9d8ff..b011674719 100644 --- a/lib/Target/Mips/MipsMSAInstrFormats.td +++ b/lib/Target/Mips/MipsMSAInstrFormats.td @@ -119,3 +119,8 @@ class MSA_VEC_FMT<bits<5> major, bits<6> minor>: MSAInst { let Inst{25-21} = major; let Inst{5-0} = minor; } + +class MSA_VECS10_FMT<bits<5> major, bits<6> minor>: MSAInst { + let Inst{25-21} = major; + let Inst{5-0} = minor; +} |