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author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-08-28 10:26:24 +0000 |
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committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-08-28 10:26:24 +0000 |
commit | a6c3a4ee76ef8464d3c83472e15af521ade7eeb4 (patch) | |
tree | 6d7144112fadae9faaac8e994ad687bddc7a582d /lib/Target/Mips/MipsMSAInstrFormats.td | |
parent | f00539cc5a5e66ce6b7ce3779b00fd381e2d2dee (diff) | |
download | llvm-a6c3a4ee76ef8464d3c83472e15af521ade7eeb4.tar.gz llvm-a6c3a4ee76ef8464d3c83472e15af521ade7eeb4.tar.bz2 llvm-a6c3a4ee76ef8464d3c83472e15af521ade7eeb4.tar.xz |
[mips][msa] Added cfcmsa, and ctcmsa
The MSA control registers have been added as reserved registers,
and are only used via ISD::Copy(To|From)Reg. The intrinsics are lowered
into these nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189468 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsMSAInstrFormats.td')
-rw-r--r-- | lib/Target/Mips/MipsMSAInstrFormats.td | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsMSAInstrFormats.td b/lib/Target/Mips/MipsMSAInstrFormats.td index 35082c2912..f337f9d8ff 100644 --- a/lib/Target/Mips/MipsMSAInstrFormats.td +++ b/lib/Target/Mips/MipsMSAInstrFormats.td @@ -69,6 +69,11 @@ class MSA_3RF_FMT<bits<4> major, bits<1> df, bits<6> minor>: MSAInst { let Inst{5-0} = minor; } +class MSA_ELM_FMT<bits<10> major, bits<6> minor>: MSAInst { + let Inst{25-16} = major; + let Inst{5-0} = minor; +} + class MSA_ELM_B_FMT<bits<4> major, bits<6> minor>: MSAInst { let Inst{25-22} = major; let Inst{21-20} = 0b00; |