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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-10-11 10:50:42 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-10-11 10:50:42 +0000 |
| commit | a6e253ddd0f757101fe97105d60a1e098ca5f33c (patch) | |
| tree | 4773d607db3ebd9ef7f1ab1abc7291c482ac6f01 /lib/Target/Mips/MipsSEISelLowering.cpp | |
| parent | 4fa2c32220405ac32838e45d91392a83fae70bb0 (diff) | |
| download | llvm-a6e253ddd0f757101fe97105d60a1e098ca5f33c.tar.gz llvm-a6e253ddd0f757101fe97105d60a1e098ca5f33c.tar.bz2 llvm-a6e253ddd0f757101fe97105d60a1e098ca5f33c.tar.xz | |
[mips][msa] Added support for matching maddv.[bhwd], and msubv.[bhwd] from normal IR (i.e. not intrinsics)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192438 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsSEISelLowering.cpp')
| -rw-r--r-- | lib/Target/Mips/MipsSEISelLowering.cpp | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsSEISelLowering.cpp b/lib/Target/Mips/MipsSEISelLowering.cpp index cdfc05c647..28aea71025 100644 --- a/lib/Target/Mips/MipsSEISelLowering.cpp +++ b/lib/Target/Mips/MipsSEISelLowering.cpp @@ -1401,6 +1401,15 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op, case Intrinsic::mips_ldi_w: case Intrinsic::mips_ldi_d: return lowerMSASplatImm(Op, 1, DAG); + case Intrinsic::mips_maddv_b: + case Intrinsic::mips_maddv_h: + case Intrinsic::mips_maddv_w: + case Intrinsic::mips_maddv_d: { + EVT ResTy = Op->getValueType(0); + return DAG.getNode(ISD::ADD, SDLoc(Op), ResTy, Op->getOperand(1), + DAG.getNode(ISD::MUL, SDLoc(Op), ResTy, + Op->getOperand(2), Op->getOperand(3))); + } case Intrinsic::mips_max_s_b: case Intrinsic::mips_max_s_h: case Intrinsic::mips_max_s_w: @@ -1467,6 +1476,15 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op, case Intrinsic::mips_mulv_d: return DAG.getNode(ISD::MUL, DL, Op->getValueType(0), Op->getOperand(1), Op->getOperand(2)); + case Intrinsic::mips_msubv_b: + case Intrinsic::mips_msubv_h: + case Intrinsic::mips_msubv_w: + case Intrinsic::mips_msubv_d: { + EVT ResTy = Op->getValueType(0); + return DAG.getNode(ISD::SUB, SDLoc(Op), ResTy, Op->getOperand(1), + DAG.getNode(ISD::MUL, SDLoc(Op), ResTy, + Op->getOperand(2), Op->getOperand(3))); + } case Intrinsic::mips_nlzc_b: case Intrinsic::mips_nlzc_h: case Intrinsic::mips_nlzc_w: |