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| author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-03-20 10:18:24 +0000 |
|---|---|---|
| committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-03-20 10:18:24 +0000 |
| commit | 3ac3e7451b93ee1d21380b75ad1432b9f28a076d (patch) | |
| tree | 78ee6500d79bca12d0724cdb5bd537bf8f7dbecd /lib/Target/Mips/MipsSEInstrInfo.cpp | |
| parent | b71fd20f2d38e7e1a6f41bdc575196dd23ab716b (diff) | |
| download | llvm-3ac3e7451b93ee1d21380b75ad1432b9f28a076d.tar.gz llvm-3ac3e7451b93ee1d21380b75ad1432b9f28a076d.tar.bz2 llvm-3ac3e7451b93ee1d21380b75ad1432b9f28a076d.tar.xz | |
Implementation of microMIPS 16-bit instructions MOVE and JALR.
Differential Revision: http://llvm-reviews.chandlerc.com/D3112
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204325 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsSEInstrInfo.cpp')
| -rw-r--r-- | lib/Target/Mips/MipsSEInstrInfo.cpp | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/lib/Target/Mips/MipsSEInstrInfo.cpp b/lib/Target/Mips/MipsSEInstrInfo.cpp index 195ad8ee1c..3393dafe1d 100644 --- a/lib/Target/Mips/MipsSEInstrInfo.cpp +++ b/lib/Target/Mips/MipsSEInstrInfo.cpp @@ -84,11 +84,15 @@ void MipsSEInstrInfo::copyPhysReg(MachineBasicBlock &MBB, unsigned DestReg, unsigned SrcReg, bool KillSrc) const { unsigned Opc = 0, ZeroReg = 0; + bool isMicroMips = TM.getSubtarget<MipsSubtarget>().inMicroMipsMode(); if (Mips::GPR32RegClass.contains(DestReg)) { // Copy to CPU Reg. - if (Mips::GPR32RegClass.contains(SrcReg)) - Opc = Mips::ADDu, ZeroReg = Mips::ZERO; - else if (Mips::CCRRegClass.contains(SrcReg)) + if (Mips::GPR32RegClass.contains(SrcReg)) { + if (isMicroMips) + Opc = Mips::MOVE16_MM; + else + Opc = Mips::ADDu, ZeroReg = Mips::ZERO; + } else if (Mips::CCRRegClass.contains(SrcReg)) Opc = Mips::CFC1; else if (Mips::FGR32RegClass.contains(SrcReg)) Opc = Mips::MFC1; |