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author | Bill Wendling <isanbard@gmail.com> | 2013-06-07 07:04:14 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2013-06-07 07:04:14 +0000 |
commit | 41e632d9e1a55d36cb08b0551ad82a13d9137a5e (patch) | |
tree | 52d4b47f777e9928012d6028eefa27bedf9f4a12 /lib/Target/Mips/MipsSEInstrInfo.cpp | |
parent | ed8b5b55a4416286758c5567c2602d2c7d0be585 (diff) | |
download | llvm-41e632d9e1a55d36cb08b0551ad82a13d9137a5e.tar.gz llvm-41e632d9e1a55d36cb08b0551ad82a13d9137a5e.tar.bz2 llvm-41e632d9e1a55d36cb08b0551ad82a13d9137a5e.tar.xz |
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183493 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsSEInstrInfo.cpp')
-rw-r--r-- | lib/Target/Mips/MipsSEInstrInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsSEInstrInfo.cpp b/lib/Target/Mips/MipsSEInstrInfo.cpp index 7a8ed7a1e9..f627fd3611 100644 --- a/lib/Target/Mips/MipsSEInstrInfo.cpp +++ b/lib/Target/Mips/MipsSEInstrInfo.cpp @@ -32,7 +32,7 @@ static cl::opt<bool> NoDPLoadStore("mno-ldc1-sdc1", cl::init(false), MipsSEInstrInfo::MipsSEInstrInfo(MipsTargetMachine &tm) : MipsInstrInfo(tm, tm.getRelocationModel() == Reloc::PIC_ ? Mips::B : Mips::J), - RI(*tm.getSubtargetImpl(), *this), + RI(*tm.getSubtargetImpl()), IsN64(tm.getSubtarget<MipsSubtarget>().isABI_N64()) {} const MipsRegisterInfo &MipsSEInstrInfo::getRegisterInfo() const { |