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authorAkira Hatanaka <ahatanaka@mips.com>2013-07-02 00:00:02 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2013-07-02 00:00:02 +0000
commita66aacf6d7e57b21dcd9e866d28749567cfba74b (patch)
tree3243b206dde2ab7b7b91901f34c59dbffb8ce9ad /lib/Target/Mips/MipsSchedule.td
parent8fed05ec1ba90c688d71323fe8a1c3070adf58cf (diff)
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[mips] Add new InstrItinClasses for move from/to coprocessor instructions and
floating point loads and stores. No changes in functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185399 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsSchedule.td')
-rw-r--r--lib/Target/Mips/MipsSchedule.td8
1 files changed, 7 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsSchedule.td b/lib/Target/Mips/MipsSchedule.td
index 1add02ff83..bf6319dae8 100644
--- a/lib/Target/Mips/MipsSchedule.td
+++ b/lib/Target/Mips/MipsSchedule.td
@@ -35,6 +35,9 @@ def IIFdivDouble : InstrItinClass;
def IIFsqrtSingle : InstrItinClass;
def IIFsqrtDouble : InstrItinClass;
def IIFrecipFsqrtStep : InstrItinClass;
+def IIFLoad : InstrItinClass;
+def IIFStore : InstrItinClass;
+def IIFmoveC1 : InstrItinClass;
def IIPseudo : InstrItinClass;
//===----------------------------------------------------------------------===//
@@ -59,5 +62,8 @@ def MipsGenericItineraries : ProcessorItineraries<[ALU, IMULDIV], [], [
InstrItinData<IIFdivDouble , [InstrStage<36, [ALU]>]>,
InstrItinData<IIFsqrtSingle , [InstrStage<54, [ALU]>]>,
InstrItinData<IIFsqrtDouble , [InstrStage<12, [ALU]>]>,
- InstrItinData<IIFrecipFsqrtStep , [InstrStage<5, [ALU]>]>
+ InstrItinData<IIFrecipFsqrtStep , [InstrStage<5, [ALU]>]>,
+ InstrItinData<IIFLoad , [InstrStage<3, [ALU]>]>,
+ InstrItinData<IIFStore , [InstrStage<1, [ALU]>]>,
+ InstrItinData<IIFmoveC1 , [InstrStage<2, [ALU]>]>
]>;