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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-01-21 13:07:31 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-01-21 13:07:31 +0000 |
| commit | be0843e76756ee93de00ecb0d9672b82d266c03c (patch) | |
| tree | f211306c2883279014cf0c994e2bc694b582d1bd /lib/Target/Mips/MipsSchedule.td | |
| parent | c55cf21ac0528f3f5c6290d6f7b35b454659cff9 (diff) | |
| download | llvm-be0843e76756ee93de00ecb0d9672b82d266c03c.tar.gz llvm-be0843e76756ee93de00ecb0d9672b82d266c03c.tar.bz2 llvm-be0843e76756ee93de00ecb0d9672b82d266c03c.tar.xz | |
[mips][sched] Split IIFmulDouble into II_MUL_D, II_MADD_D, II_MSUB_D, II_NMADD_D, and II_NMSUB_S
No functional change since the InstrItinData's have been duplicated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199737 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsSchedule.td')
| -rw-r--r-- | lib/Target/Mips/MipsSchedule.td | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/lib/Target/Mips/MipsSchedule.td b/lib/Target/Mips/MipsSchedule.td index f8244efa4e..1c23a7660a 100644 --- a/lib/Target/Mips/MipsSchedule.td +++ b/lib/Target/Mips/MipsSchedule.td @@ -20,7 +20,6 @@ def IIAlu : InstrItinClass; def IILoad : InstrItinClass; def IIStore : InstrItinClass; def IIBranch : InstrItinClass; -def IIFmulDouble : InstrItinClass; def IIFdivSingle : InstrItinClass; def IIFdivDouble : InstrItinClass; def IIFsqrtSingle : InstrItinClass; @@ -72,6 +71,7 @@ def II_FLOOR : InstrItinClass; def II_LUI : InstrItinClass; def II_MADD : InstrItinClass; def II_MADDU : InstrItinClass; +def II_MADD_D : InstrItinClass; def II_MADD_S : InstrItinClass; def II_MFHI_MFLO : InstrItinClass; // mfhi and mflo def II_MOVF : InstrItinClass; @@ -90,14 +90,18 @@ def II_MOV_D : InstrItinClass; def II_MOV_S : InstrItinClass; def II_MSUB : InstrItinClass; def II_MSUBU : InstrItinClass; +def II_MSUB_D : InstrItinClass; def II_MSUB_S : InstrItinClass; def II_MTHI_MTLO : InstrItinClass; // mthi and mtlo def II_MUL : InstrItinClass; def II_MULT : InstrItinClass; def II_MULTU : InstrItinClass; +def II_MUL_D : InstrItinClass; def II_MUL_S : InstrItinClass; def II_NEG : InstrItinClass; +def II_NMADD_D : InstrItinClass; def II_NMADD_S : InstrItinClass; +def II_NMSUB_D : InstrItinClass; def II_NMSUB_S : InstrItinClass; def II_NOR : InstrItinClass; def II_OR : InstrItinClass; @@ -216,7 +220,11 @@ def MipsGenericItineraries : ProcessorItineraries<[ALU, IMULDIV], [], [ InstrItinData<II_MSUB_S , [InstrStage<7, [ALU]>]>, InstrItinData<II_NMADD_S , [InstrStage<7, [ALU]>]>, InstrItinData<II_NMSUB_S , [InstrStage<7, [ALU]>]>, - InstrItinData<IIFmulDouble , [InstrStage<8, [ALU]>]>, + InstrItinData<II_MUL_D , [InstrStage<8, [ALU]>]>, + InstrItinData<II_MADD_D , [InstrStage<8, [ALU]>]>, + InstrItinData<II_MSUB_D , [InstrStage<8, [ALU]>]>, + InstrItinData<II_NMADD_D , [InstrStage<8, [ALU]>]>, + InstrItinData<II_NMSUB_D , [InstrStage<8, [ALU]>]>, InstrItinData<IIFdivSingle , [InstrStage<23, [ALU]>]>, InstrItinData<IIFdivDouble , [InstrStage<36, [ALU]>]>, InstrItinData<IIFsqrtSingle , [InstrStage<54, [ALU]>]>, |