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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-05-16 22:19:56 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-05-16 22:19:56 +0000 |
| commit | 66e19c3e9db6e2727be21074a52f5c9fa187050f (patch) | |
| tree | c69324d29909da842676fa2e4b2c502c6f446625 /lib/Target/Mips/MipsSubtarget.h | |
| parent | bec5463937a4e0832188327e43cf00cb7e712e38 (diff) | |
| download | llvm-66e19c3e9db6e2727be21074a52f5c9fa187050f.tar.gz llvm-66e19c3e9db6e2727be21074a52f5c9fa187050f.tar.bz2 llvm-66e19c3e9db6e2727be21074a52f5c9fa187050f.tar.xz | |
This patch adds the register class for MIPS16 as well as the ability for
llc to recognize MIPS16 as a MIPS ASE extension. -mips16 will mean the
mips16 ASE for mips32 by default.
As part of fixing of adding this we discovered some small changes that
need to be made to MipsInstrInfo::storeRegToStackSLot and
MipsInstrInfo::loadRegFromStackSlot. We were using some "==" equality tests
where in fact we should have been using Mips::<regclas>.hasSubClassEQ instead,
per suggestion of Jakob Stoklund Olesen.
Patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156958 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsSubtarget.h')
| -rw-r--r-- | lib/Target/Mips/MipsSubtarget.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsSubtarget.h b/lib/Target/Mips/MipsSubtarget.h index 7faf77baa6..4c8bdde904 100644 --- a/lib/Target/Mips/MipsSubtarget.h +++ b/lib/Target/Mips/MipsSubtarget.h @@ -86,6 +86,9 @@ protected: // HasBitCount - Count leading '1' and '0' bits. bool HasBitCount; + // InMips16 -- can process Mips16 instructions + bool InMips16Mode; + InstrItineraryData InstrItins; public: @@ -124,6 +127,7 @@ public: bool isSingleFloat() const { return IsSingleFloat; } bool isNotSingleFloat() const { return !IsSingleFloat; } bool hasVFPU() const { return HasVFPU; } + bool inMips16Mode() const { return InMips16Mode; } bool isLinux() const { return IsLinux; } /// Features related to the presence of specific instructions. |