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| author | Hal Finkel <hfinkel@anl.gov> | 2013-12-17 23:05:18 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-12-17 23:05:18 +0000 |
| commit | 18b3d1383b4cb1928fe22b1178714b55147cbb10 (patch) | |
| tree | 1a3137e61bf25be8065baf5bf0096e50241fc47a /lib/Target/Mips/MipsTargetMachine.cpp | |
| parent | af73dfe6f1703aafa79f0c57ef2bd154be154686 (diff) | |
| download | llvm-18b3d1383b4cb1928fe22b1178714b55147cbb10.tar.gz llvm-18b3d1383b4cb1928fe22b1178714b55147cbb10.tar.bz2 llvm-18b3d1383b4cb1928fe22b1178714b55147cbb10.tar.xz | |
Eliminate PPC instruction decoding ambiguities
The instruction definitions in the PPC backend have a number of variants
defined for the same instruction to represent differences between 64-bit and
32-bit semantics. In order to generate a disassembler for the PPC backend, we
need to mark all but one of these as CodeGen only.
No functionality change intended; this is prep work for PPC disassembly
support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197535 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsTargetMachine.cpp')
0 files changed, 0 insertions, 0 deletions