Next step in Mips16 prologue/epilogue cleanup.

Save S2(reg 18) only when we are calling floating point stubs that
have a return value of float or complex. Some more work to make this
better but this is the first step.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196921 91177308-0d34-0410-b5e6-96231b3b80d8

4 files changed, 56 insertions, 18 deletions

diff --git a/lib/Target/Mips/Mips16FrameLowering.cpp b/lib/Target/Mips/Mips16FrameLowering.cpp
index 6655ff98e0..ae6be05cdf 100644
--- a/lib/Target/Mips/Mips16FrameLowering.cpp
+++ b/lib/Target/Mips/Mips16FrameLowering.cpp
@@ -15,6 +15,7 @@
 #include "MCTargetDesc/MipsBaseInfo.h"
 #include "Mips16InstrInfo.h"
 #include "MipsInstrInfo.h"
+#include "MipsRegisterInfo.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
@@ -56,17 +57,31 @@ void Mips16FrameLowering::emitPrologue(MachineFunction &MF) const {
   MCSymbol *CSLabel = MMI.getContext().CreateTempSymbol();
   BuildMI(MBB, MBBI, dl,
           TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel);
-  unsigned S2 = MRI->getDwarfRegNum(Mips::S2, true);
-  MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S2, -8));
+
+
+  const MipsRegisterInfo &RI = TII.getRegisterInfo();
+  const BitVector Reserved = RI.getReservedRegs(MF);
+  bool SaveS2 = Reserved[Mips::S2];
+  int Offset=-4;
+  unsigned RA = MRI->getDwarfRegNum(Mips::RA, true);
+  MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, RA, Offset));
+  Offset -= 4;
+
+  if (SaveS2) {
+    unsigned S2 = MRI->getDwarfRegNum(Mips::S2, true);
+    MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S2, Offset));
+    Offset -= 4;
+  }
+
 
   unsigned S1 = MRI->getDwarfRegNum(Mips::S1, true);
-  MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S1, -12));
+  MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S1, Offset));
+  Offset -= 4;
 
   unsigned S0 = MRI->getDwarfRegNum(Mips::S0, true);
-  MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S0, -16));
+  MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S0, Offset));
+
 
-  unsigned RA = MRI->getDwarfRegNum(Mips::RA, true);
-  MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, RA, -4));
 
   if (hasFP(MF))
     BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
diff --git a/lib/Target/Mips/Mips16HardFloat.cpp b/lib/Target/Mips/Mips16HardFloat.cpp
index 81bf18cd09..65dbd74a1c 100644
--- a/lib/Target/Mips/Mips16HardFloat.cpp
+++ b/lib/Target/Mips/Mips16HardFloat.cpp
@@ -400,13 +400,19 @@ static bool fixupFPReturnAndCall
         Value *F = (M->getOrInsertFunction(Name, A, MyVoid, T, NULL));
         CallInst::Create(F, Params, "", &Inst );
       } else if (const CallInst *CI = dyn_cast<CallInst>(I)) {
+          Function *F_ =  CI->getCalledFunction();
+          if (F_ && !isIntrinsicInline(F_)) {
           // pic mode calls are handled by already defined
           // helper functions
-          if (Subtarget.getRelocationModel() != Reloc::PIC_ ) {
-            Function *F_ =  CI->getCalledFunction();
-            if (F_ && !isIntrinsicInline(F_) && needsFPHelperFromSig(*F_)) {
-              assureFPCallStub(*F_, M, Subtarget);
+            if (needsFPReturnHelper(*F_)) {
               Modified=true;
+              F.addFnAttr("saveS2");
+            }
+            if (Subtarget.getRelocationModel() != Reloc::PIC_ ) {
+              if (needsFPHelperFromSig(*F_)) {
+                assureFPCallStub(*F_, M, Subtarget);
+                Modified=true;
+              }
             }
           }
       }
diff --git a/lib/Target/Mips/Mips16InstrInfo.cpp b/lib/Target/Mips/Mips16InstrInfo.cpp
index 3736358bb6..2df83e8850 100644
--- a/lib/Target/Mips/Mips16InstrInfo.cpp
+++ b/lib/Target/Mips/Mips16InstrInfo.cpp
@@ -173,22 +173,29 @@ void Mips16InstrInfo::makeFrame(unsigned SP, int64_t FrameSize,
                     MachineBasicBlock &MBB,
                     MachineBasicBlock::iterator I) const {
   DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
+  const BitVector Reserved = RI.getReservedRegs(*MBB.getParent());
+  bool SaveS2 = Reserved[Mips::S2];
+  MachineInstrBuilder MIB;
   if (isUInt<11>(FrameSize))
-    BuildMI(MBB, I, DL, get(Mips::SaveX16)).addReg(Mips::RA).
+    MIB = BuildMI(
+            MBB, I, DL, get(Mips::SaveX16)).addReg(Mips::RA).
             addReg(Mips::S0).
-            addReg(Mips::S1).addReg(Mips::S2).addImm(FrameSize);
+            addReg(Mips::S1).addImm(FrameSize);
   else {
     int Base = 2040; // should create template function like isUInt that
                      // returns largest possible n bit unsigned integer
     int64_t Remainder = FrameSize - Base;
-    BuildMI(MBB, I, DL, get(Mips::SaveX16)).addReg(Mips::RA).
+    MIB = BuildMI(
+            MBB, I, DL, get(Mips::SaveX16)).addReg(Mips::RA).
             addReg(Mips::S0).
-            addReg(Mips::S1).addReg(Mips::S2).addImm(Base);
+            addReg(Mips::S1).addImm(Base);
     if (isInt<16>(-Remainder))
       BuildAddiuSpImm(MBB, I, -Remainder);
     else
       adjustStackPtrBig(SP, -Remainder, MBB, I, Mips::V0, Mips::V1);
   }
+  if (SaveS2)
+    MIB.addReg(Mips::S2);
 }
 
 // Adjust SP by FrameSize bytes. Restore RA, S0, S1
@@ -196,12 +203,16 @@ void Mips16InstrInfo::restoreFrame(unsigned SP, int64_t FrameSize,
                                    MachineBasicBlock &MBB,
                                    MachineBasicBlock::iterator I) const {
   DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
+  const BitVector Reserved = RI.getReservedRegs(*MBB.getParent());
+  bool SaveS2 = Reserved[Mips::S2];
+  MachineInstrBuilder MIB;
   if (isUInt<11>(FrameSize))
-    BuildMI(MBB, I, DL, get(Mips::RestoreX16)).
+    MIB = BuildMI(
+            MBB, I, DL, get(Mips::RestoreX16)).
             addReg(Mips::RA, RegState::Define).
             addReg(Mips::S0, RegState::Define).
             addReg(Mips::S1, RegState::Define).
-            addReg(Mips::S2, RegState::Define).addImm(FrameSize);
+            addImm(FrameSize);
   else {
     int Base = 2040; // should create template function like isUInt that
                      // returns largest possible n bit unsigned integer
@@ -210,12 +221,15 @@ void Mips16InstrInfo::restoreFrame(unsigned SP, int64_t FrameSize,
       BuildAddiuSpImm(MBB, I, Remainder);
     else
       adjustStackPtrBig(SP, Remainder, MBB, I, Mips::A0, Mips::A1);
-    BuildMI(MBB, I, DL, get(Mips::RestoreX16)).
+    MIB = BuildMI(
+            MBB, I, DL, get(Mips::RestoreX16)).
             addReg(Mips::RA, RegState::Define).
             addReg(Mips::S0, RegState::Define).
             addReg(Mips::S1, RegState::Define).
-            addReg(Mips::S2, RegState::Define).addImm(Base);
+            addImm(Base);
   }
+  if (SaveS2)
+    MIB.addReg(Mips::S2, RegState::Define);
 }
 
 // Adjust SP by Amount bytes where bytes can be up to 32bit number.
diff --git a/lib/Target/Mips/MipsRegisterInfo.cpp b/lib/Target/Mips/MipsRegisterInfo.cpp
index 3105b02084..65b1f8cf2d 100644
--- a/lib/Target/Mips/MipsRegisterInfo.cpp
+++ b/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -27,6 +27,7 @@
 #include "llvm/CodeGen/ValueTypes.h"
 #include "llvm/DebugInfo.h"
 #include "llvm/IR/Constants.h"
+#include "llvm/IR/Function.h"
 #include "llvm/IR/Type.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
@@ -183,6 +184,8 @@ getReservedRegs(const MachineFunction &MF) const {
     Reserved.set(Mips::RA_64);
     Reserved.set(Mips::T0);
     Reserved.set(Mips::T1);
+    if (MF.getFunction()->hasFnAttribute("saveS2"))
+      Reserved.set(Mips::S2);
   }
 
   // Reserve GP if small section is used.