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author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2013-12-25 10:14:07 +0000 |
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committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2013-12-25 10:14:07 +0000 |
commit | 7dc193619e1cc49ecd7e04a365f0456454087de9 (patch) | |
tree | 829cb858158c92eb0a4da11b751908329c10219e /lib/Target/Mips | |
parent | ae3597c14181f104cc71208647c90c27222865ba (diff) | |
download | llvm-7dc193619e1cc49ecd7e04a365f0456454087de9.tar.gz llvm-7dc193619e1cc49ecd7e04a365f0456454087de9.tar.bz2 llvm-7dc193619e1cc49ecd7e04a365f0456454087de9.tar.xz |
Support for microMIPS load effective address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198010 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips')
-rw-r--r-- | lib/Target/Mips/MicroMipsInstrInfo.td | 3 | ||||
-rw-r--r-- | lib/Target/Mips/MipsInstrInfo.td | 5 |
2 files changed, 6 insertions, 2 deletions
diff --git a/lib/Target/Mips/MicroMipsInstrInfo.td b/lib/Target/Mips/MicroMipsInstrInfo.td index 4f068dfe15..84cba5fb20 100644 --- a/lib/Target/Mips/MicroMipsInstrInfo.td +++ b/lib/Target/Mips/MicroMipsInstrInfo.td @@ -78,6 +78,9 @@ let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in { ADDI_FM_MM<0x1c>; def LUi_MM : MMRel, LoadUpper<"lui", GPR32Opnd, uimm16>, LUI_FM_MM; + def LEA_ADDiu_MM : MMRel, EffectiveAddress<"addiu", GPR32Opnd>, + LW_FM_MM<0xc>; + /// Arithmetic Instructions (3-Operand, R-Type) def ADDu_MM : MMRel, ArithLogicR<"addu", GPR32Opnd>, ADD_FM_MM<0, 0x150>; def SUBu_MM : MMRel, ArithLogicR<"subu", GPR32Opnd>, ADD_FM_MM<0, 0x1d0>; diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index 809ef11fd3..65e2b7a6a0 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -747,7 +747,8 @@ class MoveToLOHI<string opstr, RegisterOperand RO, list<Register> DefRegs>: class EffectiveAddress<string opstr, RegisterOperand RO> : InstSE<(outs RO:$rt), (ins mem_ea:$addr), !strconcat(opstr, "\t$rt, $addr"), - [(set RO:$rt, addr:$addr)], NoItinerary, FrmI> { + [(set RO:$rt, addr:$addr)], NoItinerary, FrmI, + !strconcat(opstr, "_lea")> { let isCodeGenOnly = 1; let DecoderMethod = "DecodeMem"; } @@ -1094,7 +1095,7 @@ def NOP : PseudoSE<(outs), (ins), []>, PseudoInstExpansion<(SLL ZERO, ZERO, 0)>; // instructions. The same not happens for stack address copies, so an // add op with mem ComplexPattern is used and the stack address copy // can be matched. It's similar to Sparc LEA_ADDRi -def LEA_ADDiu : EffectiveAddress<"addiu", GPR32Opnd>, LW_FM<9>; +def LEA_ADDiu : MMRel, EffectiveAddress<"addiu", GPR32Opnd>, LW_FM<9>; // MADD*/MSUB* def MADD : MMRel, MArithR<"madd", 1>, MULT_FM<0x1c, 0>; |