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| author | Justin Holewinski <jholewinski@nvidia.com> | 2013-02-12 14:18:49 +0000 |
|---|---|---|
| committer | Justin Holewinski <jholewinski@nvidia.com> | 2013-02-12 14:18:49 +0000 |
| commit | 7eacad03efda36e09ebd96e95d7891cadaaa9087 (patch) | |
| tree | c66658286eca956701f8334550a8edefe236b468 /lib/Target/NVPTX/NVPTX.h | |
| parent | c8a196ae8fad3cba7a777e2e7916fd36ebf70fe6 (diff) | |
| download | llvm-7eacad03efda36e09ebd96e95d7891cadaaa9087.tar.gz llvm-7eacad03efda36e09ebd96e95d7891cadaaa9087.tar.bz2 llvm-7eacad03efda36e09ebd96e95d7891cadaaa9087.tar.xz | |
[NVPTX] Disable vector registers
Vectors were being manually scalarized by the backend. Instead,
let the target-independent code do all of the work. The manual
scalarization was from a time before good target-independent support
for scalarization in LLVM. However, this forces us to specially-handle
vector loads and stores, which we can turn into PTX instructions that
produce/consume multiple operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174968 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/NVPTX/NVPTX.h')
| -rw-r--r-- | lib/Target/NVPTX/NVPTX.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/lib/Target/NVPTX/NVPTX.h b/lib/Target/NVPTX/NVPTX.h index 097b50aa4e..b46ea881c4 100644 --- a/lib/Target/NVPTX/NVPTX.h +++ b/lib/Target/NVPTX/NVPTX.h @@ -53,7 +53,6 @@ inline static const char *NVPTXCondCodeToString(NVPTXCC::CondCodes CC) { FunctionPass *createNVPTXISelDag(NVPTXTargetMachine &TM, llvm::CodeGenOpt::Level OptLevel); -FunctionPass *createVectorElementizePass(NVPTXTargetMachine &); FunctionPass *createLowerStructArgsPass(NVPTXTargetMachine &); FunctionPass *createNVPTXReMatPass(NVPTXTargetMachine &); FunctionPass *createNVPTXReMatBlockPass(NVPTXTargetMachine &); |