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author | Lang Hames <lhames@gmail.com> | 2014-04-03 20:51:08 +0000 |
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committer | Lang Hames <lhames@gmail.com> | 2014-04-03 20:51:08 +0000 |
commit | 89218827c87ce2e3ef9f968550e060fae9dfd827 (patch) | |
tree | 8d2deb1e7df579e4b8adeef7164fc3a320eb1e33 /lib/Target/NVPTX/NVPTXTargetMachine.cpp | |
parent | 23839869646bc14cd487801fd753451370f2ad25 (diff) | |
download | llvm-89218827c87ce2e3ef9f968550e060fae9dfd827.tar.gz llvm-89218827c87ce2e3ef9f968550e060fae9dfd827.tar.bz2 llvm-89218827c87ce2e3ef9f968550e060fae9dfd827.tar.xz |
[ARM64] Teach the ARM64DeadRegisterDefinition pass to respect implicit-defs.
When rematerializing through truncates, the coalescer may produce instructions
with dead defs, but live implicit-defs of subregs:
E.g.
%X1<def,dead> = MOVi64imm 2, %W1<imp-def>; %X1:GPR64, %W1:GPR32
These instructions are live, and their definitions should not be rewritten.
Fixes <rdar://problem/16492408>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205565 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/NVPTX/NVPTXTargetMachine.cpp')
0 files changed, 0 insertions, 0 deletions