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author | Hal Finkel <hfinkel@anl.gov> | 2014-02-02 06:12:27 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2014-02-02 06:12:27 +0000 |
commit | c9ac32837df68a5347ef518a351910c708460d67 (patch) | |
tree | da2b2a0960c5808dd5cc3dfc937f098f81b03988 /lib/Target/PowerPC/MCTargetDesc | |
parent | a16c1b55e2aac49c7336f3f54b50bbe85335712e (diff) | |
download | llvm-c9ac32837df68a5347ef518a351910c708460d67.tar.gz llvm-c9ac32837df68a5347ef518a351910c708460d67.tar.bz2 llvm-c9ac32837df68a5347ef518a351910c708460d67.tar.xz |
Replace PPC instruction-size code with MCInstrDesc getSize
As part of the cleanup done to enable the disassembler, the PPC instructions
now have a valid Size description field. This can now be used to replace some
custom logic in a few places to compute instruction sizes.
Patch by David Wiberg!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200623 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/MCTargetDesc')
-rw-r--r-- | lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp index f1b2802c9e..93e6fc7632 100644 --- a/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp +++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp @@ -33,10 +33,12 @@ class PPCMCCodeEmitter : public MCCodeEmitter { PPCMCCodeEmitter(const PPCMCCodeEmitter &) LLVM_DELETED_FUNCTION; void operator=(const PPCMCCodeEmitter &) LLVM_DELETED_FUNCTION; + const MCInstrInfo &MCII; const MCContext &CTX; public: - PPCMCCodeEmitter(const MCInstrInfo &mcii, MCContext &ctx) : CTX(ctx) { + PPCMCCodeEmitter(const MCInstrInfo &mcii, MCContext &ctx) + : MCII(mcii), CTX(ctx) { } ~PPCMCCodeEmitter() {} @@ -90,18 +92,14 @@ public: // It's just a nop to keep the register classes happy, so don't // generate anything. unsigned Opcode = MI.getOpcode(); + const MCInstrDesc &Desc = MCII.get(Opcode); if (Opcode == TargetOpcode::COPY_TO_REGCLASS) return; uint64_t Bits = getBinaryCodeForInstr(MI, Fixups, STI); - // BL8_NOP etc. all have a size of 8 because of the following 'nop'. - unsigned Size = 4; // FIXME: Have Desc.getSize() return the correct value! - if (Opcode == PPC::BL8_NOP || Opcode == PPC::BLA8_NOP || - Opcode == PPC::BL8_NOP_TLS) - Size = 8; - // Output the constant in big endian byte order. + unsigned Size = Desc.getSize(); int ShiftValue = (Size * 8) - 8; for (unsigned i = 0; i != Size; ++i) { OS << (char)(Bits >> ShiftValue); |