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author | Chris Lattner <sabre@nondot.org> | 2006-11-14 18:44:47 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2006-11-14 18:44:47 +0000 |
commit | 6a5339ba656805a9cd3bf7d884f99bb87ec84e98 (patch) | |
tree | 9a385327f69b24dfe893c74fab094c6eefe78da3 /lib/Target/PowerPC/PPCCodeEmitter.cpp | |
parent | d10434215da983b58389d2a0880dfcd2cd3b7f35 (diff) | |
download | llvm-6a5339ba656805a9cd3bf7d884f99bb87ec84e98.tar.gz llvm-6a5339ba656805a9cd3bf7d884f99bb87ec84e98.tar.bz2 llvm-6a5339ba656805a9cd3bf7d884f99bb87ec84e98.tar.xz |
Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls
clobber. This allows LR8 to be save/restored correctly as a 64-bit quantity,
instead of handling it as a 32-bit quantity. This unbreaks ppc64 codegen when
the code is actually located above the 4G boundary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31734 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCCodeEmitter.cpp')
-rw-r--r-- | lib/Target/PowerPC/PPCCodeEmitter.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp index c321cbcdee..cc874af039 100644 --- a/lib/Target/PowerPC/PPCCodeEmitter.cpp +++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp @@ -102,6 +102,7 @@ void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) { case PPC::IMPLICIT_DEF_VRRC: break; // pseudo opcode, no side effects case PPC::MovePCtoLR: + case PPC::MovePCtoLR8: assert(0 && "CodeEmitter does not support MovePCtoLR instruction"); break; } |