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authorEvan Cheng <evan.cheng@apple.com>2011-07-25 19:53:23 +0000
committerEvan Cheng <evan.cheng@apple.com>2011-07-25 19:53:23 +0000
commit966aeb5788c242cfaca35c56c0ddc0ff778d4376 (patch)
tree2bf9cdcb6d8d5ec4653383793a42ec248f83b2f0 /lib/Target/PowerPC/PPCCodeEmitter.cpp
parenta87e40f16f1c3117412e01107807e490d6fb29bc (diff)
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Refactor PPC target to separate MC routines from Target routines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135942 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCCodeEmitter.cpp')
-rw-r--r--lib/Target/PowerPC/PPCCodeEmitter.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp
index 42232a0753..4a1f1822af 100644
--- a/lib/Target/PowerPC/PPCCodeEmitter.cpp
+++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp
@@ -140,7 +140,7 @@ unsigned PPCCodeEmitter::get_crbitm_encoding(const MachineInstr &MI,
const MachineOperand &MO = MI.getOperand(OpNo);
assert((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
(MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7));
- return 0x80 >> PPCRegisterInfo::getRegisterNumbering(MO.getReg());
+ return 0x80 >> getPPCRegisterNumbering(MO.getReg());
}
MachineRelocation PPCCodeEmitter::GetRelocation(const MachineOperand &MO,
@@ -250,7 +250,7 @@ unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI,
// The GPR operand should come through here though.
assert((MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF) ||
MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7);
- return PPCRegisterInfo::getRegisterNumbering(MO.getReg());
+ return getPPCRegisterNumbering(MO.getReg());
}
assert(MO.isImm() &&