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author | Hal Finkel <hfinkel@anl.gov> | 2014-03-27 22:22:48 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2014-03-27 22:22:48 +0000 |
commit | 6bdc4ebedd16bc2102edc4bfbc63c76c7c130ef0 (patch) | |
tree | e8331809bc0c239253703bf7abe9a722d5ab82eb /lib/Target/PowerPC/PPCISelLowering.cpp | |
parent | 72f0f26d3b595d76d86f886d01caf8d9cad13bd4 (diff) | |
download | llvm-6bdc4ebedd16bc2102edc4bfbc63c76c7c130ef0.tar.gz llvm-6bdc4ebedd16bc2102edc4bfbc63c76c7c130ef0.tar.bz2 llvm-6bdc4ebedd16bc2102edc4bfbc63c76c7c130ef0.tar.xz |
[PowerPC] Fix v2f64 vector extract and related patterns
First, v2f64 vector extract had not been declared legal (and so the existing
patterns were not being used). Second, the patterns for that, and for
scalar_to_vector, should really be a regclass copy, not a subregister
operation, because the VSX registers directly hold both the vector and scalar data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204971 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 16ff0eb7d7..1c19160c9c 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -535,6 +535,7 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) if (Subtarget->hasVSX()) { setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2f64, Legal); + setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f64, Legal); setOperationAction(ISD::FFLOOR, MVT::v2f64, Legal); setOperationAction(ISD::FCEIL, MVT::v2f64, Legal); |