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author | Jim Laskey <jlaskey@mac.com> | 2006-12-01 16:30:47 +0000 |
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committer | Jim Laskey <jlaskey@mac.com> | 2006-12-01 16:30:47 +0000 |
commit | fbb74e6941ebf6c108a4e385902e5e2cd35b739d (patch) | |
tree | 06179c75ca4a09f15fb497d33b8e414d4fa3e357 /lib/Target/PowerPC/PPCISelLowering.cpp | |
parent | 45e507ca9bb09f02e24496cc0885b4ea7debdba9 (diff) | |
download | llvm-fbb74e6941ebf6c108a4e385902e5e2cd35b739d.tar.gz llvm-fbb74e6941ebf6c108a4e385902e5e2cd35b739d.tar.bz2 llvm-fbb74e6941ebf6c108a4e385902e5e2cd35b739d.tar.xz |
1. In ppc64 mode we need only use one GPR.
2. Float values need to be promoted to double when they are vararg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32074 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index d564ff7b68..d5129d5688 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -1377,6 +1377,12 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) { break; case MVT::f32: case MVT::f64: + if (isVarArg && isPPC64) { + // Float varargs need to be promoted to double. + if (Arg.getValueType() == MVT::f32) + Arg = DAG.getNode(ISD::FP_EXTEND, MVT::f64, Arg); + } + if (FPR_idx != NumFPRs) { RegsToPass.push_back(std::make_pair(FPR[FPR_idx++], Arg)); @@ -1390,7 +1396,7 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) { MemOpChains.push_back(Load.getValue(1)); RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load)); } - if (GPR_idx != NumGPRs && Arg.getValueType() == MVT::f64) { + if (GPR_idx != NumGPRs && Arg.getValueType() == MVT::f64 && !isPPC64){ SDOperand ConstFour = DAG.getConstant(4, PtrOff.getValueType()); PtrOff = DAG.getNode(ISD::ADD, PtrVT, PtrOff, ConstFour); SDOperand Load = DAG.getLoad(PtrVT, Store, PtrOff, NULL, 0); |